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ASE ASEK LGA Substrate Design Rev. :0 Date : 03/09/04” Prepared : Damon_Hung.

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Presentation on theme: "ASE ASEK LGA Substrate Design Rev. :0 Date : 03/09/04” Prepared : Damon_Hung."— Presentation transcript:

1 ASE ASEK LGA Substrate Design Rev. :0 Date : 03/09/04” Prepared : Damon_Hung

2 ASE Content.Necessary Data Of Substrate Design.Pad / Exposed Metal (Square).Pad / Exposed Metal (Non Square).Pin#1 Design Rule.PAD ASSIGN SEQUENCE.Refer To “ CSP design rule-customer “  Substrate Structure  Ring / Finger Placement & S/M Design Rule  Finger Design Rule  Bonding finger width, wire quantity and wire diameter design rule  Outer Layer Trace Design Rule & Finished Value  Inner Layer Trace Design Rule & Finished Value  Via Design Rule  Laminate Blind Via Design  Wire Bond Design Rule

3 ASE  Package type  Body size  Substrate layer number  Bond pad number of ground / power / signal  Staggered or inline pad design  Actual die size or estimated min./max. die size  Bond finger number for each side of package  Metal pad number, location and pitch  Net list (pad no., net-name, ball no.)  Power consumption (Thermal requirement)  Electrical requirement Necessary Data Of Substrate Design

4 ASE Pad / Exposed Metal Rule (Square<9x9)

5 ASE Pad / Exposed Metal Rule (Square>=9x9)

6 ASE Pad / Exposed Metal Rule (Non Square)

7 ASE Pin#1 Design Rule

8 ASE PAD ASSIGN SEQUENCE PIN#1 is in left-top side(top view) and assign pads sequence by counterclockwise


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