1. FIT1005 FIT – Monash University
Topic 5 - Digital Data Communication Techniques
Reference:
Chapter 6 - Stallings

2. Introduction
For two devices linked by a transmission medium to exchange data, a high degree of cooperation is required
Typically data are transmitted one bit at a time over the medium
The timing (rate, duration, spacing) of these bits must be the same for transmitter and receiver
Two common techniques used for controlling this timing are known as synchronous and asynchronous transmission

3. Introduction Serial transmission
signalling elements are sent down the line one at a time
data are transferred over a single signal line
Parallel transmission
data are transferred over multiple signal lines
I/O devices, system bus
Inside computer

4. Asynchronous Transmission
The strategy with this scheme is to avoid the timing problem by not sending long, uninterrupted streams of bits
Instead, data are transmitted one character at a time, where each character is 7 bits in length
Timing or synchronisation must only be maintained within each character
The receiver has the opportunity to resynchronise at the beginning of each new character

5. Asynchronous Transmission

6. Asynchronous Transmission
When no character is being transmitted, the line between the transmitter and receiver is in an idle state
The definition of idle is equivalent to the signalling element for binary 1
The beginning of a character is signalled by a start bit with a value of binary 0
This is followed by the 7 bits that actually make up the ASCII character

7. Asynchronous Transmission
Parity bit
The data bits are usually followed by a parity bit
This set by the transmitter such that the total number of ones in the character, including the parity bit, is even (even parity) or odd (odd parity) depending on the convention used
This bit is used by the receiver for error detection
The final element is a stop element, which is a binary 1
A minimum length for the stop element is specified (usually 1, 1.5, or 2 time the duration of an ordinary bit)
No maximum value is specified as the stop bit the same as the idle state

8. Asynchronous Transmission
In (c) the data rate is 10,000bps, therefore each bit time is 1/10000secs or 0.1ms or 100microsecs.
Receiver’s clock is fast by 6% or 6microsecs
The receiver samples the incoming character every 94microsecs
This results in two errors
the last sampled bit is incorrectly received
the bit count may now be out of alignment
If bit 7 is 1 and bit 8 is a 0, bit 8 could be mistaken for a start bit
This condition is termed as a framing error, as the characters plus start bit and stop element are sometimes referred to as a frame

9. Asynchronous Transmission
Is simple but requires an overhead of two (20%) to three bits per character
% of overhead could be reduced by sending larger blocks of bits between the start bit and stop element
However, the larger the block of bits, the greater the cumulative timing error
To achieve greater efficiency, a different form of synchronisation, known as synchronous transmission is used

10. Synchronous Transmission
A block of bits is transmitted in a steady stream without a start bit and stop element
The block may be many bits in length
To prevent timing drift between transmitter and receiver, their clocks must somehow be synchronised:
Separate clock line
Clocking information in the data signal

11. Synchronous Transmission
Separate Clock Line
One side (transmitter or receiver) pulses the line regularly with one short pulse per bit time
The other side uses these regular pulses as a clock
This technique works well over short distances, but over longer distances the clock pulses are subject to impairments

12. Synchronous Transmission
Clocking information in the data signal
Embed the clocking information in the data signal
For digital signals, this can be achieved with Manchester encoding
For analog signals, the carrier frequency itself can be used for synchronisation

13. Synchronous Transmission
Block Level Synchronisation
Another level of synchronisation is required
To allow the receiver to determine the beginning and end of a block of data
To achieve this, each block begins with a preamble bit pattern and generally ends with a postamble bit pattern

14. Synchronous Transmission
Block Level Synchronisation
In addition, other bits are added to the block that convey control information used in the data link control procedures
The data plus preamble (flag), postamble (flag), and control information are called a frame
The exact format of the frame depends on which data link control procedure is being used

15. Synchronous Transmission
Efficiency
For sizeable blocks of data, synchronous transmission is far more efficient than asynchronous transmission
Asynchronous transmission requires 20% or more overhead
The control information, preamble, and postamble in synchronous transmission are typically less than 100 bits
For example,
HDLC contains 48 bits of control, preamble, and postamble
Thus for 1000-character block, the % of overhead is only 0.6%

16. Types of Errors
In digital transmission, an error occurs when a bit is altered between transmission and reception
Single-bit errors
An isolated error condition that alters one bit but does not affect near by bits
Can occur in the presence of thermal noise, a slight random deterioration of the signal-to-noise ratio is sufficient to confuse the receiver’s decision of a single bit

17. Types of Errors Burst errors
A burst error of length B is a contiguous sequence of B bits in which the first and last bits and any number of intermediate bits are received in error
Burst errors can be caused by impulse noise and fading in a mobile wireless environment
The effect of burst errors are greater at higher data rates

18. Error Detection Techniques
For a given frame of bits, additional bits that constitute an error- detecting code (also known as check bits) are added by the transmitter
This code is calculated as a function of the other transmitted bits
The receiver performs the same error-detection calculation on the data bits and compares this value with the value of the incoming error-detection code
A detected error occurs, if and only if there is a mismatch

19. Error Detection Techniques

20. Parity Check
The simplest error detection scheme is to append a parity bit to the end of a block of data
A typical example is a character transmission, in which a parity bit is attached to each 7-bit IRA character
The value of this bit is selected so that the character has an even number of 1s (even parity) or an odd number 1s (odd parity)
However, if two (or any even number) of bits are inverted due to error, an undetected error occurs
The use of the parity bit is not foolproof, as noise impulses are often long enough to destroy more than one bit

21. Cyclic Redundancy Check (CRC)
CRC is one of the most common and powerful error-detecting codes
Given a k-bit block of bits, the transmitter generates an (n-k) bit sequence, known as a frame check sequence (FCS), such that the resulting frame , consisting of n bits, is exactly divisible by some predetermined number
The receiver then divides the incoming frame by that number, and if there is no remainder, assumes there was no error

22. Feedback Error Correction
Correction of errors using an error-detection code requires that block of data to be retransmitted

23. Forward Error Correction
For wireless applications this approach is in adequate:
The bit error rate on a wireless link can be quite high, which would result in a large number of retransmissions
In some cases (satellite links), the propagation delay is very long compared to transmission time of a single frame
Results in a very inefficient system

24. Forward Error Correction
It desirable to enable the receiver to correct errors in an incoming transmission on the basis of the bits in that transmission
Usually this is done by mapping each k-bit block of data into an n-bit block called a codeword using an FEC (forward error correction) encoder

25. Forward Error Correction

26. Forward Error Correction
The codeword is then transmitted
During transmission, the signal is subjected to impairments, which may produce bit errors
At the receiver, the incoming signal is demodulated to produce a bit string that is similar to the original codeword but may contain errors

27. Forward Error Correction
The received codeword is passed through an FEC decoder with possible outcomes:
Decoder detects no bit errors
For certain error patterns, it is possible for the decoder to detect an correct those errors
Thus, even though the incoming data block differs from the transmitted codeword, FEC decoder is able to recreate the original data block

28. Forward Error Correction
The received codeword is passed through an FEC decoder with possible outcomes:
For certain error patterns, the decoder can detect but not correct them
The decoder simply reports an uncorrectable error
For certain, typically rare, error patterns, the decoder does not detect that any errors have occurred

29. Forward Error Correction
Works by adding redundancy to the transmitted message
The redundancy makes it possible for the receiver to deduce what the original message was, even in the face of certain level of error rate

30. Interfacing Data Terminal Equipment (DTE)
The devices such as terminals and computers

31. Interfacing Data Circuit-terminating Equipment (DCE)
A DTE makes use of the transmission system through the mediation of the DCE - modem
Is responsible for transmitting and receiving bits, one at a time, over a transmission medium or network
It must interact with the DTE

32. Interfacing Requires both data and control information to be exchanged
It is done over a set of wires referred to as interchange circuits
Two DCEs that exchange signals over a transmission medium must use the same encoding scheme (e.g., Manchester) and data rate
DCE-DTE pairs must be designed to interact cooperatively
To ease the data processing equipment manufactures and users, standards have been developed that specify the exact nature of the interface between the DTE and DCE

33. Interfacing

34. Interfacing Interface characteristics Mechanical
Pertain to the actual physical connections of the DTE to DCE
Typically, the signal and control interchange circuits are bundled into a cable with terminator connector, male or female, at each end – 9 Pin, 25 Pin, RJ45 connectors
The DTE and DCE must present connectors of opposite genders at one end of the cable

35. Mechanical and Functional Characteristics

36. Interfacing Interface characteristics Electrical
Deal with the voltage levels and timing of voltage changes
Both DTE and DCE must use the same code (e.g., NRZ-L), must use the same voltage levels to mean the same things and must use the same duration of signal elements
These characteristics determine the data rates and distances that can be achieved
Functional
Specifies the functions that are performed by assigning meanings to each of the interchange circuits

37. Interface characteristics
Interfacing
Interface characteristics
Procedural
Specify the sequence of events for transmitting data, based on functional characteristics of the interface
A variety of standards exist for interfacing
Example, the V.24/EIA-232-F and ISDN physical interfaces
The former is used to connect DTE devices to 56K modems for use on PSTN

38. Slides after this are for your interest only

39. Error Detection
In the following discussion, we assume that data are transmitted as one or more contiguous sequences of bits, called frames
The following probabilities with respect to errors in transmitted frames are defined
Pb: Probability that a bit is received in error; also known as bit error rate (BER)
P1: Probability that a frame arrives with no bit error
P2:Probability that, with an error-detection algorithm in use, a frame arrives with one or more undetected errors

40. Error Detection Contd.
P3: probability that, with an error-detection algorithm in use, a frame arrives with one or more detected bit errors but no undetected bit errors
Consider the case in which no means are taken to detect errors
Then P3 = 0
Assuming that the probability that any bit is in error (Pb) is constant, we have
P1 = (1-Pb)F where F is the number of bits per frame
P2 = 1 – P1

41. Interfacing
Most digital data processing devices have limited data transmission capability
Typically, they generate a simple digital signal, and the distance across which they can transmit data is limited
As a result, it is rare for such a device (terminal , computer) to attach directly to a transmission or networking facility
The devices such as terminals and computers are generally referred to as data terminal equipment (DTE)