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TPC DAQ developments Gilles De Lentdecker, Yifan Yang, Erik Verhagen, IIHE-ULB (Brussels)

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Presentation on theme: "TPC DAQ developments Gilles De Lentdecker, Yifan Yang, Erik Verhagen, IIHE-ULB (Brussels)"— Presentation transcript:

1 TPC DAQ developments Gilles De Lentdecker, Yifan Yang, Erik Verhagen, IIHE-ULB (Brussels)

2 ILC TPC: New D-RORC design DDL DRORC From PC to µTCA Collaboration with DESY, Lund HDMI SFP PCIe Based on ALICE Hardware: FEC, RCU, DDL, DRORC (PCI)

3 Specifications From detector: DDL : 200MBps GBT : 400MBps To DAQ: PCI (64bit@100MHz) :800MBps PCIe (serial link) : 250 or 500 MBps/lane (up to 8 lanes) Plateform : PC MicroTCA (Micro Telecommunication Computing Architecture)

4 Interface Separated board with GBIC

5 MMC study AMC connector CMC connector Power module MCU Sensor SFP module

6 PCIe study QSE connector Optical module Jitter cleaner DDR2 memory PCIe×1 connector FPGA Power module

7 Future plan µTCA crate A large interconnection network with high bandwidth (10G ethernet, PCIe, etc) Large processing power with some flexibility SFP POWER MODULE FLASH MEMORY MCU FPGA BACKPLANE

8 Thank You!

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