1. Latches and Flip-Flops
ECOM 4311
Digital System Design using VHDL
Chapter 8
Latches and Flip-Flops

2. Introduction Previous chapters focused on combinational systems.
However, most digital systems are sequential. A sequential system’s outputs are a function of both its present input value and past history of its input values.
Memory elements are required in a sequential system to store information that characterizes the system’s past history of input values.
In this chapter, basic latch and flip-flop memory elements are discussed.

3. Revision: SEQUENTIAL SYSTEMS
Section 8.1 SEQUENTIAL SYSTEMS AND THEIR MEMORY ELEMENTS
Self reading

4. THE D LATCH

5. Latched multiplexer

6. D latch with asynchronous set and clear inputs

7. Logic synthesized from Listing 8. 2
Logic synthesized from Listing for D latch with asynchronous set and clear inputs.

8. Using a Concurrent Signal Assignment to Infer a Latch
A concurrent signal assignment statement can also be used to infer a latch, although this is not a preferred approach.

9. DETECTING CLOCK EDGES

10. D FLIP- FLOP

11. D FLIP- FLOP

12. Using a Wait Statement to Infer a Flip-flop

13. Asynchronous Set and Clear Inputs

14. Note:
A drawback in using a wait statement to infer a flip-flop is that it is not possible to add asynchronous set and/or clear inputs, because all assignments executed after the wait are synchronous assignments.

15. D flip-flop with synchronous set and clear

17. ENABLED (GATED) FLIP-FLOP
Often there is a need to have a flip-flop store its data for more than one clock cycle.
This is achieved by having the flip-flop store its input data only at selected triggering clock edges and not at others.
To accomplish this, we add an enable (gate) input to the flip-flop.
There are two common approaches:
The gated clock approach
The gated data approach

18. The gated clock approach

19. The gated clock approach
If the signal at the en input has glitches, there is a problem with this approach.
Often, this signal is the output of a combinational system, which might produce glitches as its inputs change.

20. The gated data approach

21. The gated data approach

22. OTHER FLIP-FLOP TYPES
There are four basic types of flip-flops that have traditionally been used in digital systems: D, S-R, J-K, and T.
These flip-flops differ primarily in the number and function of their synchronous inputs.
The use of S-R, J-K, or T flip-flops instead of D flip-flops often allowed simplification of the combinational logic required to drive the flip-flops’ inputs.

23. The characteristic equation
The characteristic equation specifies a flip-flop’s next state (output) as a function of its synchronous inputs.

24. S-R Flip-flop

25. S-R Flip-flop

26. J-K Flip-flop
A description of a J-K flip-flop can be created from Listing by simply changing the synchronous input labels and replacing the characteristic equation with that of a J-K flip-flop.

27. Toggle Flip-flop

28. Homework Solve the following problems from the textbook chapter 8:
4, 6, 11, 18,28,30

29. Finally…. ?
Any Questions