1. 1 Ó1998 Morgan Kaufmann Publishers Chapter 8 I/O Systems

2. 2 Ó1998 Morgan Kaufmann Publishers 5 Components of Any Computer

3. 3 Ó1998 Morgan Kaufmann Publishers “What’s This Stuff Good For?”

4. 4 Ó1998 Morgan Kaufmann Publishers Motivation for Input/Output

5. 5 Ó1998 Morgan Kaufmann Publishers I/O Design Issues

6. 6 Ó1998 Morgan Kaufmann Publishers Outline

7. 7 Ó1998 Morgan Kaufmann Publishers I/O System Performance

8. 8 Ó1998 Morgan Kaufmann Publishers Simple Producer-Server Model

9. 9 Ó1998 Morgan Kaufmann Publishers Throughput vs. Respond Time

10. 10 Ó1998 Morgan Kaufmann Publishers Throughput Enhancement

11. 11 Ó1998 Morgan Kaufmann Publishers I/O Benchmarks for Perf. Measure (1/2)

12. 12 Ó1998 Morgan Kaufmann Publishers I/O Benchmarks for Perf. Measure (2/2)

13. 13 Ó1998 Morgan Kaufmann Publishers Outline

14. 14 Ó1998 Morgan Kaufmann Publishers I/O Device Examples and Speeds

15. 15 Ó1998 Morgan Kaufmann Publishers Magnetic Disk

16. 16 Ó1998 Morgan Kaufmann Publishers Disk History (1/2)

17. 17 Ó1998 Morgan Kaufmann Publishers Disk History (2/2)

18. 18 Ó1998 Morgan Kaufmann Publishers 1-inch Disk Drive!

19. 19 Ó1998 Morgan Kaufmann Publishers Storage Technology Drivers

20. 20 Ó1998 Morgan Kaufmann Publishers Historical Perspective

21. 21 Ó1998 Morgan Kaufmann Publishers Technology Trends

22. 22 Ó1998 Morgan Kaufmann Publishers Disk Device Technology

23. 23 Ó1998 Morgan Kaufmann Publishers Photo of Disk Head, Arm, Actuator

24. 24 Ó1998 Morgan Kaufmann Publishers Magnetic Disk Characteristic

25. 25 Ó1998 Morgan Kaufmann Publishers Typical Numbers of a Magnetic Disk

26. 26 Ó1998 Morgan Kaufmann Publishers Typical Numbers of a Magnetic Disk

27. 27 Ó1998 Morgan Kaufmann Publishers Recent Example: Barracuda 180

28. 28 Ó1998 Morgan Kaufmann Publishers Disk Device Performance ※ Assumes average seek distance is random

29. 29 Ó1998 Morgan Kaufmann Publishers Example

30. 30 Ó1998 Morgan Kaufmann Publishers Areal Density

31. 31 Ó1998 Morgan Kaufmann Publishers Data Rate: Inner vs. Outer Tracks

32. 32 Ó1998 Morgan Kaufmann Publishers Disk Performance Model/Trends

33. 33 Ó1998 Morgan Kaufmann Publishers Reliability and Availability

34. 34 Ó1998 Morgan Kaufmann Publishers Disk Arrays

35. 35 Ó1998 Morgan Kaufmann Publishers Disk Summary

36. 36 Ó1998 Morgan Kaufmann Publishers Outline

37. 37 Ó1998 Morgan Kaufmann Publishers What Is a Bus?

38. 38 Ó1998 Morgan Kaufmann Publishers

39. 39 Ó1998 Morgan Kaufmann Publishers Advantages of Buses

40. 40 Ó1998 Morgan Kaufmann Publishers Disadvantage of Buses

41. 41 Ó1998 Morgan Kaufmann Publishers The General Organization of a Bus

42. 42 Ó1998 Morgan Kaufmann Publishers Master versus Slave

43. 43 Ó1998 Morgan Kaufmann Publishers Buses According to Functionality

44. 44 Ó1998 Morgan Kaufmann Publishers A Computer System with One Bus: Backplane Bus

45. 45 Ó1998 Morgan Kaufmann Publishers A Two-Bus System

46. 46 Ó1998 Morgan Kaufmann Publishers A Three-Bus System

47. 47 Ó1998 Morgan Kaufmann Publishers Main Components of Intel Chipset

48. 48 Ó1998 Morgan Kaufmann Publishers Buses According to Clocking

49. 49 Ó1998 Morgan Kaufmann Publishers Simple Synchronous Protocol

50. 50 Ó1998 Morgan Kaufmann Publishers Simple Synchronous Protocol (Write)

51. 51 Ó1998 Morgan Kaufmann Publishers Asynchronous Handshake (Read)

52. 52 Ó1998 Morgan Kaufmann Publishers Asynchronous Handshake (Write)

53. 53 Ó1998 Morgan Kaufmann Publishers Multiple Potential Bus Masters: Need Arbitration

54. 54 Ó1998 Morgan Kaufmann Publishers Daisy Chain Bus Arbitration

55. 55 Ó1998 Morgan Kaufmann Publishers Centralized Parallel Arbitration

56. 56 Ó1998 Morgan Kaufmann Publishers Increasing the Bus Bandwidth

57. 57 Ó1998 Morgan Kaufmann Publishers Increasing Transaction Rate on Multimaster Bus

58. 58 Ó1998 Morgan Kaufmann Publishers Summary of Bus Options

59. 59 Ó1998 Morgan Kaufmann Publishers Bus Summary

60. 60 Ó1998 Morgan Kaufmann Publishers Outline

61. 61 Ó1998 Morgan Kaufmann Publishers What Need to Make I/O Work?

62. 62 Ó1998 Morgan Kaufmann Publishers Instruction Set Architecture for I/O

63. 63 Ó1998 Morgan Kaufmann Publishers Memory Mapped I/O

64. 64 Ó1998 Morgan Kaufmann Publishers Processor-I/O Speed Mismatch

65. 65 Ó1998 Morgan Kaufmann Publishers Processor Checks Status before Acting

66. 66 Ó1998 Morgan Kaufmann Publishers Polling: Programmed I/O

67. 67 Ó1998 Morgan Kaufmann Publishers Alternative to Polling?

68. 68 Ó1998 Morgan Kaufmann Publishers I/O Interrupt

69. 69 Ó1998 Morgan Kaufmann Publishers Interrupt Driven Data Transfer

70. 70 Ó1998 Morgan Kaufmann Publishers Questions Raised about Interrupts

71. 71 Ó1998 Morgan Kaufmann Publishers Improving Data Transfer Performance

72. 72 Ó1998 Morgan Kaufmann Publishers What is DMA (Direct Memory Access)?

73. 73 Ó1998 Morgan Kaufmann Publishers Delegating I/O from CPU: DMA

74. 74 Ó1998 Morgan Kaufmann Publishers Delegating I/O from CPU: IOP

75. 75 Ó1998 Morgan Kaufmann Publishers Responsibilities of Operating System

76. 76 Ó1998 Morgan Kaufmann Publishers Functions OS Must Provide

77. 77 Ó1998 Morgan Kaufmann Publishers OS: I/O Requirements

78. 78 Ó1998 Morgan Kaufmann Publishers Summary