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DIGITAL SIGNAL PROCESSORS. What are Digital Signals? Digital signals have finite precision in both the time (sampled) and amplitude (quantized) domains.

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Presentation on theme: "DIGITAL SIGNAL PROCESSORS. What are Digital Signals? Digital signals have finite precision in both the time (sampled) and amplitude (quantized) domains."— Presentation transcript:

1 DIGITAL SIGNAL PROCESSORS

2 What are Digital Signals? Digital signals have finite precision in both the time (sampled) and amplitude (quantized) domains.

3 What are Digital Signal Processors? Digital Signal Processors are microprocessors optimized to perform digital signal processing tasks.

4 Uses of DSPs Telephone: Signal Multiplexing Military: RADAR Medicine: MRI Scientific: Spectral Analysis Industrial: Oil Prospecting Commercial: Movie Special Effects

5 Uses (contd…)

6 Characteristics of DSPs Real-time processing Limited data types (e.g. floating point) Very Large Instruction Word (VLIW) architecture

7 Characteristics (contd…) DSPs are optimized for mathematical calculations (as opposed to data manipulation).

8 Characteristics (contd…) Harvard Architecture

9 Characteristics (contd…) Specialized registers (e.g. extended precision accumulators) Onboard fast RAM, ROM, DMA Massive Parallelism

10 Floating Point vs. Fixed Point Advantages of Floating Point: Precision Greater Dynamic Range Shorter Development Time Better Signal-to-noise Ratio Disadvantages of Floating Point: Expensive

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12 Assembly vs. C Advantages of Assembly Faster Requires less memory Disadvantages of Assembly Expensive Hard to maintain Intimate knowledge of hardware required

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14 Sample DSP: SMJ320C6701 Military DSP used in munitions guidance, avionics, navigation, electronic countermeasures, anti- submarine warfare, etc.

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16 SMJ320C6701 (contd…) Up to 1 GFLOPS at 167 MHz Load/Store architecture Instructions operate on data in registers

17 VLIW architecture IEEE floating point Double precision 4 cycle throughput Single precision 1 cycle throughput Variable length execution packets SMJ320C6701 (contd…)

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19 CPU SMJ320C6701 (contd…)

20 Internal Program Memory Internal Data Memory Host Port Interface Allows other processors access to internal DSP memory. SMJ320C6701 (contd…)

21 Multichannel Buffered Serial Port Allows fast inter-processor communication Direct Memory Access Fewer CPU interrupts External Memory Interface Glueless interface to SBRAM, SRDRAM and SRAM SMJ320C6701 (contd…)

22 Some Signals CLOCK CLKIN: clock input CLKMODE: x4 or x1 output clock f DMA DMAC3,2,1,0: DMA action complete EMIF control CE3,2,1,0: memory space enables, enabled by bits 24 and 25 of word address

23 Bus Arbitration HOLD: HOLD request HOLDA: HOLD acknowledge DRAM control SDRAS: SDRAM row address strobe SDCAS: SDRAM column strobe SDWE: SDRAM write enable SDCLK: SDRAM clock Some Signals (contd…)

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