2. Digital Systems
Section 11
Decoders and Encoders

3. Lecture
Digital Systems
Binary Decoders
A binary decoder can be considered as a black box with n input lines and 2n output lines.
Only one output line is set to 1 for a given input. I n 1 –
inputs E
Enable 2
outputs O

4. Lecture
Digital Systems
Binary Decoders
Binary decoders convert an n-bit input to a single output. It uses its n-bit input to determine which of the 2n outputs will be uniquely activated.
Binary decoders can be developed using AND or OR Gates.
Later on, binary decoders can be implemented in logic circuits.
The outputs of a decoder are minterms. That is why decoders are sometimes called as minterm generators.
We can easily use a decoder to implement any sum of minterms expression.
Note: A minterm is a Boolean expression resulting in 1 only for the output of a single row (in a truth table) or a single cell (in a Karnaugh map), and 0s for all other row or cells, respectively.

5. Lecture
Digital Systems
2-to-4 Binary Decoder
A circuit of 2-to-4 binary decoder is shown below.
Binary
Decoder
2 inputs
4 outputs
Enable
The truth table shows that for any given input combination, exactly one output will turn to 1.
The enable must be set to 1 to get an output.

6. Lecture
Digital Systems
3-to-8 Binary Decoder
Try to understand the logic circuit of 3-to-8 binary decoder below.
Binary
Decoder
3 inputs
8 outputs
Enable

7. 3-to-8 Decoder Using Two 2-to-4 Decoders
Lecture
Digital Systems
3-to-8 Decoder Using Two 2-to-4 Decoders X E
Enable Y Z F0 F1 F2 F3 F4 F5 F6 F7 I0 I1 O0 O1 O2 O3
Using Enable signal, which is separated by a combinational circuit

8. Implementing Functions Using Decoders
Lecture
Digital Systems
Implementing Functions Using Decoders
Any n-variable logic function can be implemented using a single n-to-2n decoder, to generate the minterms (as given by the truth table or the Karnaugh map).
All the minterms are then summed up by an OR Gate.
Any combinational circuit with n inputs and m outputs can be implemented with an n-to-2n decoder and m OR Gates.
A decoder is suitable to use when a circuit has many outputs, where each output function is expressed with its minterms.

9. Implementing Functions Using Decoders
Lecture
Digital Systems
Implementing Functions Using Decoders
Full Adder
Each OR Gate collects all minterms of respective output
One OR Gate for every output

10. Implementing Functions Using Decoders
Lecture
Digital Systems
Implementing Functions Using Decoders
Making a 4-to-16 Decoder from two 3-to-8 Decoders
In this example, only one decoder can be active at a time.
X, Y, and Z effectively select the output line for a certain value of W.
MSB W is used as Enable signal

11. Implementing Functions Using Decoders
Lecture
Digital Systems
Implementing Functions Using Decoders
Making a Multiplexer from a 2-to-4 Decoder
Output
Enable = 1 E I0 I1 O0 O1 O2 O3 X Y F0 F1 F2 F3

12. Lecture
Digital Systems
Binary Encoders
Binary encoders convert its 2n inputs to an n-bit output.
Only one high value is presented as input. The result is a binary-encoded output of size n.
Binary encoders are useful for compressing data. 2 n
inputs I 1 – O
outputs

13. Lecture
Digital Systems
4-to-2 Binary Encoder
In encoder circuit only one input may be set high (1) at a certain time.
The output is a 2-bit number. 1 I3 I2 I1 I0 Y1 Y0 I0 I1 I2 I3 Y1 Y0

14. Lecture
Digital Systems
8-to-3 Binary Encoder
In this encoder circuit, at any certain time, only one input line has the value of 1.
The output is binary digits of Y2 Y1 Y0.
This circuit is also called octal-to-binary encoder.

15. 4-to-2 Priority Encoder
For some application, there can be more than one input line that have a value of 1.
One way to handle these inputs is to ignore the lower inputs and only process the highest input (‘priority input’). 1 X I3 I2 I1 I0 Y1 Y0
This encoder has 4 input lines: I3, I2, I1, and I0.
I3 has the highest priority, I0 has the lowest priority. I0 I1 I2 I3 Y1 Y0
Draw the Karnaugh maps for both outputs Y1 and Y0. ?
Y1 = I3’·I2 + I3
Y0 = I3’·I2’·I1 + I3

16. Lecture
Digital Systems
8-to-3 Priority Encoder
The following is the truth table of an 8-to-3 priority encoder.
X indicates don’t cares.

17. Lecture
Digital Systems
8-to-3 Priority Encoder
As one alternative solution, we can use a priority encoder that implements the following logic functions:
H0 = I7’·I6’·I5’·I4’·I3’·I2’·I1’·I0
H1 = I7’·I6’·I5’·I4’·I3’·I2’·I1
H2 = I7’.I6’·I4’·I4’·I3’·I2
H3 = I7’.I6’·I5’·I4’·I3
H4 = I7’·I6’·I5’·I4
H5 = I7’·I6’·I5
H6 = I7’·I6
H7 = I (Highest Priority)

18. Lecture
Digital Systems
8-to-3 Priority Encoder
The overall circuit of the priority encoder will be as shown below.
The equations that express the binary encoder are:
Y0 = I1 + I3 + I5 + I7 Y1 = I2 + I3 + I6 + I7 Y2 = I4 + I5 + I6 + I7

19. Design Exercise: 8-to-3 Priority Encoder
Lecture
Digital Systems
Design Exercise: 8-to-3 Priority Encoder
Design an 8-to-3 priority encoder that will deliver only the lowest input and process it to becomes the output.

20. Priority Encoder Navigation
One possible application of encoder is in positional control as used on ships or robotics.
The angular position of a compass or the rotary position of a joint is converted into a digital code by a 8-to-3 priority encoder.
An example of a simple 8-position to 3-bit output encoder is shown below.

21. Lecture
Digital Systems
Homework 8
Sketch the output waveforms of a 8-to-3 priority encoder based on the given waveforms below (left).
Using binary decoders and/or encoders introduced in this lecture, create a circuit that will be able to memorize the birth dates of 8 students, as shown in the table below (right).
Input (Student ID)
Output (Birth date) 1 16 2 23 3 05 4 14 5 17 6 03 7 09 8 27 I6 I7 1
I0 = I1 = I2 = I3 = I4 = I5 = 1
Deadline: 25 November 2015.