Download presentation
Presentation is loading. Please wait.
1
Lecture 6 Complex NMOS 240-451 VLSI, 2000
Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Lecture 6 Complex NMOS VLSI, 2000
2
In the Past 240-451 VLSI, 2000 VDD B Y A C
Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut In the Past A C B Y VDD VLSI, 2000
3
Department of Computer Engineering, Prince of Songkla University
Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Memory NMOS VLSI, 2000
4
Dynamic RAM 1. Dynamic RAM using 6 NMOS High bit rate word sequential
Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Dynamic RAM 1. Dynamic RAM using 6 NMOS High bit rate word sequential 1 1 B A VLSI, 2000
5
Dynamic RAM 2. Dynamic RAM using 4 NMOS Row select 240-451 VLSI, 2000
Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Dynamic RAM 2. Dynamic RAM using 4 NMOS Row select VLSI, 2000
6
Dynamic RAM using 4 NMOS B1 - bit line B2 - bit line
Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Dynamic RAM using 4 NMOS B1 - bit line B2 - bit line VLSI, 2000
7
Read Dynamic RAM using 4 NMOS
Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Read Dynamic RAM using 4 NMOS off on Activate word line I I = 0 VLSI, 2000
8
Write “0” in Dynamic RAM using 4 NMOS
Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Write “0” in Dynamic RAM using 4 NMOS 1 OFF ON Cg2 Release Q until not have I at T2, then Cg1 charge Q until T1 ON Flip/Flop VLSI, 2000
9
Dynamic RAM using 3 NMOS Read/write start at f2 = 1 1
Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Dynamic RAM using 3 NMOS Read/write start at f2 = 1 1 VLSI, 2000
10
Write “1” in Dynamic RAM using 3 NMOS
Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Write “1” in Dynamic RAM using 3 NMOS write and f2 = 1 off Y = 1 VLSI, 2000
11
Write “0” in Dynamic RAM using 3 NMOS
Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Write “0” in Dynamic RAM using 3 NMOS write and f2 = 0 1 Off No changing VLSI, 2000
12
Read Dynamic RAM using 3 NMOS
Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Read Dynamic RAM using 3 NMOS write and f2 = 0 / read and f2 = 1 ON OFF Off when Y = 0 If Y = 1 bit line = 0 if Y= 0 bit line = 1 VLSI, 2000
13
Dynamic RAM using 1 NMOS 240-451 VLSI, 2000
Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Dynamic RAM using 1 NMOS VLSI, 2000
14
Write into Dynamic RAM using 1 NMOS
Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Write into Dynamic RAM using 1 NMOS 1 Write ‘1’ with charge Cs Value which want to write ‘0’ or ‘1’ Write ‘0’ with nocharge Cs VLSI, 2000
15
Read Dynamic RAM using 1 NMOS
Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Read Dynamic RAM using 1 NMOS discharge Q ‘0’ or ‘1’ detect with sense amplifier VLSI, 2000
16
Department of Computer Engineering, Prince of Songkla University
Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Static RAM VLSI, 2000
17
PROM (mask programmable rom) EPROM (erasable programmable rom)
Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut ROM PROM (mask programmable rom) EPROM (erasable programmable rom) EEPROM (electrically erasable programmable rom) VLSI, 2000
18
Memory Structure in VLSI
Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Memory Structure in VLSI VLSI, 2000
19
ROM circuit, 4x4 bit NOR based ROM Array
Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut ROM circuit, 4x4 bit NOR based ROM Array VLSI, 2000
20
Department of Computer Engineering, Prince of Songkla University
Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut VLSI, 2000
21
4x4 bit NAND based ROM Array
Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut 4x4 bit NAND based ROM Array VLSI, 2000
22
temporary memory using in Data path
Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Shift Register temporary memory using in Data path Half register Half register VLSI, 2000
23
Half Register Half register 240-451 VLSI, 2000
Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Half Register Half register VLSI, 2000
24
Data Path input input Combination 240-451 VLSI, 2000
Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Data Path input input Combination VLSI, 2000
25
PLA (Programmable logic arrays)
Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut PLA (Programmable logic arrays) Built by R. Preobsting NOR-NOR Structure (Product of Sum) VLSI, 2000
26
PLA (Programmable logic arrays)
Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut PLA (Programmable logic arrays) Change to be NOR logic before program VLSI, 2000
27
How to program PLA 240-451 VLSI, 2000
Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut How to program PLA VLSI, 2000
Similar presentations
