1. Lecture 13 PicoBlaze I/O & Interrupt Interface Example of Assembly Language Routine
ECE 448 – FPGA and ASIC Design with VHDL

2. ECE 448 – FPGA and ASIC Design with VHDL
Required reading
P. Chu, FPGA Prototyping by VHDL Examples
Chapter 16, PicoBlaze I/O Interface
Chapter 17, PicoBlaze Interrupt Interface
ECE 448 – FPGA and ASIC Design with VHDL

3. Output Decoding of Four Output Registers
ECE 448 – FPGA and ASIC Design with VHDL

4. Timing Diagram of an Output Instruction
ECE 448 – FPGA and ASIC Design with VHDL

5. Truth Table of a Decoding Circuit
ECE 448 – FPGA and ASIC Design with VHDL

6. Block Diagram of Four Continuous-Access Ports
ECE 448 – FPGA and ASIC Design with VHDL

7. Timing Diagram of an Input Instruction
ECE 448 – FPGA and ASIC Design with VHDL

8. Block Diagram of Four Single-Access Ports
ECE 448 – FPGA and ASIC Design with VHDL

9. ECE 448 – FPGA and ASIC Design with VHDL
FIFO Interface
clk
rst
clk
rst
FIFO
din
dout 8 8
full
empty
write
read
ECE 448 – FPGA and ASIC Design with VHDL

10. ECE 448 – FPGA and ASIC Design with VHDL
Operation of FIFO
ECE 448 – FPGA and ASIC Design with VHDL

11. ECE 448 – FPGA and ASIC Design with VHDL
Interrupt Flow
ECE 448 – FPGA and ASIC Design with VHDL

12. Timing Diagram of an Interrupt Event
ECE 448 – FPGA and ASIC Design with VHDL

13. ECE 448 – FPGA and ASIC Design with VHDL

14. Interrupt Interface with a Single Event
ECE 448 – FPGA and ASIC Design with VHDL

15. Interrupt Interface with Two Requests
ECE 448 – FPGA and ASIC Design with VHDL

16. Time-Multiplexed Seven Segment Display
ECE 448 – FPGA and ASIC Design with VHDL

17. Block Diagram of the Hexadecimal Time-Multiplexing Circuit
ECE 448 – FPGA and ASIC Design with VHDL

18. ECE 448 – FPGA and ASIC Design with VHDL
Hexadecimal Multiplexing Circuit Based on PicoBlaze and mod-500 Counter
ECE 448 – FPGA and ASIC Design with VHDL

19. Example of a function in the PicoBlaze assembly language
ECE 448 – FPGA and ASIC Design with VHDL

20. Notation
a Multiplicand ak-1ak a1 a0
x Multiplier xk-1xk x1 x0
p Product (a  x) p2k-1p2k p2 p1 p0

21. Multiplication of two 4-bit unsigned
binary numbers
Partial Product 0
Partial Product 1
Partial Product 2
Partial Product 3

22. Unsigned Multiplication – Basic Equations
k-1
x =  xi  2i
p = a  x
i=0
k-1
p = a  x =  a  xi  2i =
= x0a20 + x1a21 + x2a22 + … + xk-1a2k-1
i=0

23. Iterative Algorithm for Unsigned Multiplication
Shift/Add Algorithm
p = a  x = x0a20 + x1a21 + x2a22 + … + xk-1a2k-1 =
= (...((0 + x0a2k)/2 + x1a2k)/ xk-1a2k)/2 =
k times
p(0) = 0
p(j+1) = (p(j) + xj a 2k) / 2
j=0..k-1
p = p(k)

24. Unsigned Multiplication Computations
8 bits
8 bits pH pL p
p(j)
xj a
+ xj a 28 + pH pL C
2 p(j+1)
>> 1
p(j+1) pH pL C
pH = s5
pL = s6
PicoBlaze Registers
a = s3
x = s4

25. Unsigned Multiplication Subroutine (1)
;=========================================================
; routine: mult_soft
; function: 8-bit unsigned multiplier using
; shift-and-add algorithm
; input register:
; s3: multiplicand
; s4: multiplier
; output register:
; s5: upper byte of product
; s6: lower byte of product
; temporary register:
; s2: index j

26. Unsigned Multiplication Subroutine (2)
mult_soft:
load s5, ;clear s5
load s2, ;initialize loop index
mult_loop:
sr0 s ;shift lsb to carry
jump nc, shift_prod ;lsb is 0
add s5, s ;lsb is 1
shift_prod:
sra s ;shift upper byte right,
;carry to MSB, LSB to carry
sra s ;shift lower byte right,
;lsb of s5 to MSB of s6
sub s2, ;dec loop index
jump nz, mult_loop ;repeat until i=0
return

27. Edit instructions - Shifts
*All shift instructions affect Zero and Carry flags