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COMP541 Digital Logic and Computer Design Montek Singh Jan 11, 2016.

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Presentation on theme: "COMP541 Digital Logic and Computer Design Montek Singh Jan 11, 2016."— Presentation transcript:

1 COMP541 Digital Logic and Computer Design Montek Singh Jan 11, 2016

2 Today’s Topics  Course description What’s this course about? What’s this course about? Syllabus Syllabus  Textbook and Resources  Course Requirements  Grading  Policies and Honor Code  Material from Chapter 1 (self-study review) What is digital logic? What is digital logic? Binary signaling Binary signaling Number systems Number systems Codes Codes 2

3 What’s This Course About?  Digital Logic transistors (briefly) transistors (briefly) gates gates combinational circuits combinational circuits sequential circuits (state machines) sequential circuits (state machines)  Computer Design arithmetic circuits arithmetic circuits memories memories processor architecture processor architecture input and output input and output  Emphasis on high-level descriptions hardware description lang. (System Verilog) instead of circuits hardware description lang. (System Verilog) instead of circuits modern design practices modern design practices 3

4 Key Learning Objectives  At the end of this course, you should be able to: convert a specification into an implementation convert a specification into an implementation hierarchically decompose a complex spec hierarchically decompose a complex spec  into simpler components understand concurrency understand concurrency  develop concurrent system specs and implementations test a given design for correctness test a given design for correctness  develop a test bench and performing simulation use state-of-the-art software tools for hardware design use state-of-the-art software tools for hardware design  “computer-aided-design” (CAD) tools  Each student will have: designed a full microprocessor (basic MIPS from COMP411) designed a full microprocessor (basic MIPS from COMP411) implemented it on a development kit implemented it on a development kit programmed it in assembly to show a demo programmed it in assembly to show a demo 4

5 Who is this course for?  Advanced course in digital logic and computer design follow-up to COMP 411 (Computer Organization) follow-up to COMP 411 (Computer Organization) full-gate level implementation of MIPS processor from 411 full-gate level implementation of MIPS processor from 411  including memories and I/O  Who should take this course? undergrads who want to pursue a career or further studies in the fields of: undergrads who want to pursue a career or further studies in the fields of:  computer architecture  chip design, or other engineering disciples grad students looking to fill a gap in their coursework grad students looking to fill a gap in their coursework anyone interested in learning how a digital system is implemented, in a hands-on manner anyone interested in learning how a digital system is implemented, in a hands-on manner 5

6 6 How will we build an entire computer?  Labs on Fridays hands-on experience in designing digital circuits/systems hands-on experience in designing digital circuits/systems start small, but quickly go to higher levels of abstraction start small, but quickly go to higher levels of abstraction  We will write descriptions of design instead of drawing circuit diagrams instead of drawing circuit diagrams descriptions look like “code” descriptions look like “code”  high-level language  BEWARE: these are not software programs! use compilation tools to convert into gates and wires use compilation tools to convert into gates and wires map (“burn”) these designs onto a reconfigurable chip map (“burn”) these designs onto a reconfigurable chip  called Field Programmable Gate Array (FPGAs)  chips with a lot of circuits (millions of transistors)  sort of like burning music to a rewritable CD

7 Development Kits  Each student will be loaned a kit for the semester  BIG thanks to NVIDIA and Xilinx for donating $$ for our Nexys 4 kits!! In the middle: reconfigurable chip In the middle: reconfigurable chip  sort of a “blank” chip onto which you “burn” logic circuits  first describe your design in a high-level language  simulate design in software  compile (synthesize) into gate-level circuit  “burn” it onto this chip 7 Dev kit (Nexys 4)

8 How to represent circuits?  Schematic Diagram: drawing showing components and their interconnections visual representation visual representation  good for documentation good for small circuits good for small circuits infeasible for large-scale systems infeasible for large-scale systems  typically use hierarchical drawings 8

9 How to represent circuits?  Hardware Description Language (HDL): textual description of the circuit easier to type than to draw! easier to type than to draw! works well with automated design and test tools works well with automated design and test tools we will use an HDL called Verilog we will use an HDL called Verilog 9 /* A Mod 4 counter */ module CounterMod4 (clock, reset, value); module CounterMod4 (clock, reset, value); input clock; input clock; input reset; input reset; output reg[1:0] value = 0; output reg[1:0] value = 0; always_ff @(posedge clock) begin always_ff @(posedge clock) begin value <= reset ? 0 : (value + 1); value <= reset ? 0 : (value + 1); end endendmodule

10 How to compile HDL to circuits?  Use design tools from the kit maker  Each student must install her/his own copy Download from web (will be provided on course website) Download from web (will be provided on course website) Big download: ~10 GB (allow overnight) Big download: ~10 GB (allow overnight) Do it before Friday’s lab session Do it before Friday’s lab session  Wait for instructions on Wed Platforms: Platforms:  Windows 7/8 and Linux: best support  Mac OS X: use Bootcamp/VMWare + Windows –harder to make it work with Parallels 10

11 Grading Criteria  Final grade will be based on: Labs:35% Labs:35% Final Project: 20% Final Project: 20% Homework: 12% Homework: 12% Quizzes: 8% Quizzes: 8% Midterm: 10% Midterm: 10% Final Exam: 15% Final Exam: 15% Bonus Points: Up to 5 extra points for Bonus Points: Up to 5 extra points for  extra credit work  stellar work on lab assignments/project  class participation  participation on Piazza discussion board 11

12 Grading Criteria  Labs about one every week about one every week each builds upon the previous ones each builds upon the previous ones  important to follow sequence, and DO THEM ALL  culminates in the final project  Project everyone builds a full microprocessor (basic MIPS from 411) everyone builds a full microprocessor (basic MIPS from 411) write assembly code to show a demo (“game”) write assembly code to show a demo (“game”) demo in front of whole class demo in front of whole class  and other faculty and students may be invited  Homework: 3-5 assignments  Quizzes: 3-5 announced, ~15 min long announced, ~15 min long  Exams: Midterm and Final 12

13 Course Policies  Late Penalty Labs: Labs:  electronic submissions  everyone gets 7 “free late days”  for each calendar day (or part of day) late, one free day is spent  once free days are exhausted, each late day results in 1 point taken out of the lab assignment score Homework: Homework:  due in hardcopy in class/lab session  one session late: 25% penalty  two sessions late: 50% penalty  after then, not accepted –no late work accepted once solutions are distributed 13

14 Course Policies  Missed classes, quizzes, exam conflicts classes: while attendance is not required, there is no substitute to coming to class if you want a good grade classes: while attendance is not required, there is no substitute to coming to class if you want a good grade labs: labs:  many assignments require demos during lab sessions  I provide lots of tips/hints during the session  skipping a lab (even if you have a good excuse) will make things very hard quizzes: since the dates are announced, please see me well in advance if you have a compelling reason for absence quizzes: since the dates are announced, please see me well in advance if you have a compelling reason for absence exams: bring any conflicts to my attention ASAP exams: bring any conflicts to my attention ASAP 14

15 Honor Code  Collaboration: Allowed (even encouraged) to discuss basic concepts Allowed (even encouraged) to discuss basic concepts  use discussion board on Piazza  bonus points for active participation! BUT: What you hand in must be your own BUT: What you hand in must be your own  write solutions and code individually  Previous Semesters: Cannot use homework solutions from previous offerings of this course Cannot use homework solutions from previous offerings of this course Cannot obtain lab assignments/code from students who have taken this course before Cannot obtain lab assignments/code from students who have taken this course before  Not following these rules is a violation of honor code 15

16 Textbook and Resources  Textbook: be sure to get the 2 nd ed. be sure to get the 2 nd ed.  Other resources: website website  homework, labs, lectures, etc. Verilog language reference Verilog language reference  on course website personal laptop computer personal laptop computer  Windows or Linux  Mac OS with Bootcamp/VMWare development kits (provided) development kits (provided) 16 Harris and Harris, Digital Design and Computer Architecture, 2nd ed. (July 2012), ISBN 9780123944245, Morgan Kaufmann

17 17 Overview of Textbook  Chapters 1-5: Digital logic Combinational, sequential, basic circuits, HDL Combinational, sequential, basic circuits, HDL  Chapter 6: Architecture Fast – review for those who took COMP 411 Fast – review for those who took COMP 411  Chapter 7: Microarchitectures  Chapters 8: Memories  Appendix A: Implementation FPGAs, etc. FPGAs, etc.  Order of topics: Will change order from that in book Will change order from that in book  to try to get you working on interesting labs sooner

18 18 Class Web Page Website: http://comp541spring16.web.unc.edu http://comp541spring16.web.unc.edu http://comp541spring16.web.unc.edu Linked from my home page http://www.cs.unc.edu/~montek Linked from my home page http://www.cs.unc.edu/~montek http://www.cs.unc.edu/~montek All lecture slides, lab assignments posted there All lecture slides, lab assignments posted there Syllabus, homework, etc. posted there Syllabus, homework, etc. posted there See Sakai for scores/grades See Sakai for scores/grades Use Piazza for questions/discussions Use Piazza for questions/discussions  TAs: David Cubler and Patrick Elmer  Office Hours to be finalized by Friday, Jan 15 to be finalized by Friday, Jan 15

19 Now Shift to Technology Should be a review for all of you

20 Complexity and Abstraction  This course will span several abstraction levels from transistors … from transistors … … to architecture … to architecture  Mostly stay above transistor level at most one class on transistors and chip layout at most one class on transistors and chip layout  Mostly go “bottom up” culminate in the design of a full computer in the labs culminate in the design of a full computer in the labs 20

21 The Three -Y’s  Hierarchy divide a system into modules and submodules divide a system into modules and submodules  keep dividing until pieces are easy to understand  Modularity modules have well-defined functions and interfaces modules have well-defined functions and interfaces  so can be connected easily without surprises  Regularity encouraging uniformity, so modules can be easily reused encouraging uniformity, so modules can be easily reused  so same set of basic building blocks can be used  e.g., a 16-bit adder uses the same basic blocks as an 8-bit adder 21

22 22 Digital vs. Analog  Analog – infinite resolution Like (old fashioned) radio dial Like (old fashioned) radio dial We’ll do very little with analog We’ll do very little with analog  VGA, maybe sound: approximate them using digital values  Digital – a finite set of values Like money Like money Can’t get smaller than cents Can’t get smaller than cents Typically also has maximum value Typically also has maximum value

23 23 Binary Signaling  Zero volts FALSE or 0 FALSE or 0  5 or 3.3 (or 1.8 or 1.5) volts TRUE or 1 TRUE or 1  Modern chips down to 1V  Why not multilevel signaling?

24 24 Discrete Data  Some data inherently discrete Names (sets of letters) Names (sets of letters)  Some quantized Music recorded from microphone Music recorded from microphone Note that other examples like music from CD or electronic keyboard already quantized Note that other examples like music from CD or electronic keyboard already quantized Mouse movement is quantized Mouse movement is quantized

25 25 Numbers and Arithmetic  I have put most of these slides at end Backup in case you’ve forgotten Backup in case you’ve forgotten  Review of: binary/octal/hexadecimal numbers binary/octal/hexadecimal numbers arithmetic arithmetic  Let’s cover Other codes, parity Other codes, parity

26 26BCD  Binary Coded Decimal  Decimal digits stored in binary Four bits/digit Four bits/digit Like hex, except stops at 9 Like hex, except stops at 9 Example Example 931 is coded as 1001 0011 0001 931 is coded as 1001 0011 0001  Remember: these are just encodings. Meanings are assigned by us.

27 27 Other Codes Exist  Non positional  Example: Gray Code Only one bit changes at a time Only one bit changes at a time 000,001,011,010,110,111,101,100 000,001,011,010,110,111,101,100 Why is this useful? Why is this useful? Actually there’s a family of Gray codes Actually there’s a family of Gray codes Ref: http://lib-www.lanl.gov/numerical/bookcpdf/c20-2.pdf

28 28 Character Codes  From numbers to letters  ASCII Stands for American Standard Code for Information Interchange Stands for American Standard Code for Information Interchange Only 7 bits defined Only 7 bits defined  Unicode  You may make up your own code for the MIPS VGA

29 29 ASCII table

30 30 Even Parity  Sometimes an extra bit (parity bit) appended to enable detection of errors  Even parity – set parity bit to make number of 1’s even  Examples: assume the parity bit is added to the left A (1000001) for an even-parity system is 01000001 C (1000011) for an even-parity system is 11000011

31 31 Odd Parity  Similar except make the number of 1’s odd  Examples A (1000001) for an odd-parity system is 11000001 C (1000011) for an odd-parity system is 01000011

32 32 Error Detection  Note that parity detects only simple errors One, three, etc. bits One, three, etc. bits  More complex methods exist  Some that enable recovery of original info Cost is more redundant bits Cost is more redundant bits

33 33Reading  Read Chapter 1

34 34 Next Class  Combinational Logic Basics First Lab: Fri, Jan 15 I will demo tools I will demo tools You should have your tools installed and bring your laptop You should have your tools installed and bring your laptop

35 Reference Slides Should be all review material

36 36 Binary Numbers  Strings of binary digits (“bits”) One bit can store a number from 0 to 1 One bit can store a number from 0 to 1 n bits can store numbers from 0 to 2 n n bits can store numbers from 0 to 2 n

37 37 Binary – Powers of 2  Positional representation  Each digit represents a power of 2 So 101 binary is 1 2 2 + 0 2 1 + 1 2 0 1 2 2 + 0 2 1 + 1 2 0or 1 4 + 0 2 + 1 1 = 5 1 4 + 0 2 + 1 1 = 5

38 38 Converting Binary to Decimal  Easy, just multiply digit by power of 2  Just like a decimal number is represented  Example follows

39 39 Binary  Decimal Example 76543210 27272727 26262626 25252525 24242424 23232323 22222222 21212121 20202020 1286432168421 10011100 128 + 0 + 0 + 16 + 8 + 4 + 0 + 0 = 156 What is 10011100 in decimal?

40 40 Decimal to Binary  A little more work than binary to decimal  Some examples 3 = 2 + 1 = 11 (that’s 12 1 + 12 0 ) 3 = 2 + 1 = 11 (that’s 12 1 + 12 0 ) 5 = 4 + 1 = 101 (that’s 12 2 + 02 1 + 12 0 ) 5 = 4 + 1 = 101 (that’s 12 2 + 02 1 + 12 0 )

41 41 Algorithm – Decimal to Binary  Find largest power-of-two smaller than decimal number  Make the appropriate binary digit a ‘1’  Subtract the power of 2 from decimal  Do the same thing again

42 42 Decimal  Binary Example  Convert 28 decimal to binary 76543210 27272727 26262626 25252525 24242424 23232323 22222222 21212121 20202020 1286432168421 32 is too large, so use 16 Binary  10000Decimal  28 – 16 = 12 Binary  11000Decimal  12 – 8 = 4 Next is 8 Binary  11100Decimal  4 – 4 = 0 Next is 4

43 43Hexadecimal  Strings of 0s and 1s too hard to write  Use base-16 or hexadecimal – 4 bits DecBinHex 000000 100011 200102 300113 401004 501015 601106 701117 DecBinHex 810008 910019 101010? 111011? 121100? 131101? 141110? 151111?

44 44Hexadecimal  Letters to represent 10-15 DecBinHex 000000 100011 200102 300113 401004 501015 601106 701117 DecBinHex 810008 910019 101010a 111011b 121100c 131101d 141110e 151111f Power of 2Power of 2 Size of byteSize of byte Why use base 16?

45 45 Hex to Binary  Convention – write 0x before number  Hex to Binary – just convert digits BinHex 00000 00011 00102 00113 01004 01015 01106 01117 10008 10019 1010a 1011b 1100c 1101d 1110e 1111f 0x2ac 001010101100 0x2ac = 001010101100 No magic – remember 1 “hexit” = 4 bits

46 46 Binary to Hex  Just convert groups of 4 bits (group from LSB) BinHex 00000 00011 00102 00113 01004 01015 01106 01117 10008 10019 1010a 1011b 1100c 1101d 1110e 1111f 101 0011 0111 1011 1011 537b 101001101111011 = 0x537b 0101  0111  0011 

47 47 Hex to Decimal  Just multiply each hex digit by decimal value, and add the results. position 3210 power 16 3 16 2 16 1 16 0 value 4096256161 0x2ac 2 256 + 10 16 + 12 1 = 684 DecHex 00 11 22 33 44 55 66 77 88 99 10a 11b 12c 13d 14e 15f

48 Decimal to Hex  Analogous to decimal  binary. 1. Find largest power-of-16 smaller than decimal number 2. Divide by power-of-16. The integer result is hex digit. 3. The remainder is new decimal number. 4. Do the same thing again 48

49 49 Decimal to Hex position 3210 power 16 3 16 2 16 1 16 0 value 4096256161 DecHex 00 11 22 33 44 55 66 77 88 99 10a 11b 12c 13d 14e 15f 684 684 / 256 = 2 0x2__ 684 % 256 = 172 172 / 16 = 10 = a 0x2a_ 172 % 16 = 12 = c 0x2ac

50 Decimal to Hex (ver 2)  Start from the right 1. Divide the number by 16. 2. The remainder is the rightmost hexit. 3. The quotient becomes the new number. 4. Do the same thing again, appending each new hexit to the left 50

51 51 Decimal to Hex position 3210 power 16 3 16 2 16 1 16 0 value 4096256161 DecHex 00 11 22 33 44 55 66 77 88 99 10a 11b 12c 13d 14e 15f 684 % 16 = 12 = c 684 / 16 = 42 0x__c 42 % 16 = 10 = a 42 / 16 = 2 0x_ac 2 % 16 = 2 0x2ac

52 52Octal  Octal is base 8  Similar to hexadecimal Conversions Conversions  Less convenient for use with 8-bit bytes

53 53 Arithmetic -- addition  Binary similar to decimal arithmetic 01100 A +10001 B 11101Sum No carries101100Carry10110A +10111B 101101Sum 1+1 is 2 (or 10 2 ), which results in a carry

54 54 Arithmetic -- subtraction  Two methods similar to subtraction “by hand” with “borrows” (e.g. below) similar to subtraction “by hand” with “borrows” (e.g. below) or, convert B to 2’s complement and then add to A or, convert B to 2’s complement and then add to A 10110 A -10010 B 00100Diff No carries00110Borrow11110A -10011B 01011Diff 0 - 1 results in a “borrow”

55 55 Arithmetic -- multiplication 1011 0000 1011 110111 Successive additions of multiplicand or zero, multiplied by 2. Note that multiplication by 2 just shifts bits left. 1011X 101


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