1. Reconfigurable Asynchronous Logic Automaton
David Dalrymple
Erik Demaine
Neil Gershenfeld

2. Reconfigurable Asynchronous Logic Automata
stem
(RALA)
wire
XOR
crossover OR
delete
David Dalrymple
Erik Demaine
Neil Gershenfeld
NAND
copy
AND
wire

3. Motivation for Theoreticians
What is the model of computation of the physical universe?
Computation = local interaction of particles
Particles move around (which takes time)
Very different from existing models:
Sequential models of computation (RAM, etc.)
Memory hierarchies ~model movement to a single CPU, but this is an unnecessarily limit
PRAM/UMA ignores communication cost
Most distributed computing ignores geometry

4. Motivation for Systems
80-core Teraflop Intel Polaris
Motivation for Systems
Evolution increasingly multicore
What happens in the limit?
FPGAs highly successful
Is there a universal chip architecture supporting general algorithms nearly as efficiently as all other chips?
XILINX FPGA

5. Motivation for Fabrication
How should computation scale to physically large objects?
Walls
Displays
Surfaces
3D print
Robots
Solar furnace in Odellio, France. Temperatures up to 33,000° C.

6. Ideas Behind RALA Unify computation & data to equal # bits
computation = data = shape = communication
Unify computation & data to equal # bits
Embed into geometric space
Communicate subject to physical laws
Essentially a general circuit, where longer wires take longer to carry data
Globally asynchronous to enable scaling, but locally synchronous for ease of use
Reconfigurable to enable programming

7. Asynchronous Logic Automaton (ALA)
Circuit = grid of cells (squares or cubes)
Single-bit stream processor
Up to two inputs
Any number of outputs
Wires between neighbors
Buffers a single bit (0 or 1)
Can have no bits (X)
Gate operates when all inputs are ready (0 or 1) & outputs are free (X) OR
AND X 1 X 1 X X OR
XOR X 1 X 1 X 1
NAND OR X 1

8. ALA 1 X

9. ALA is Easy to Program (similar to standard digital circuits)
SEA cryptosystem
sorter
multiplier
router (project with Cisco)

10. Reconfiguration in RALA
Stem cell turns data into programs by reprogramming neighbors & itself
Format of input stream (from one source):
Direction (3 bits): make neighbor a stem cell
Forward bits to neighbor until it says “done”
Cell type (3 bits): AND, NAND, OR, XOR, crossover, copy, delete, stem
Input directions (3 bits  2 inputs)
Output directions (6 bits)
Repeat (or special 000 code  done)
Putting the R in RALA!
NAND

11. How to Make Anything with RALA
Circuit rasterization:
Zig-zag through target circuit region using forwarding mechanism of stem cell
(requires region to have a Hamiltonian path)
Send code to program cells in reverse order
Stem
Stem
NAND,F,L,B
AND,B,R,F
OR,L,N,BR
XOR,R,F,B
forward
OR,R,N,F
OR,B,L,L
right
right
left
left OR
AND
Stem
Stem OR
XOR
Stem
Stem
NAND OR

12. CAD  RALA cad.py face = circle(0,0,10) eye = circle(0,0,2)
face = subtract(face, move(eye,4,3))
face = subtract(face, move(eye,-4,3))
mouth = circle(0,0,8)
mouth = subtract(mouth, circle(0,0,6))
mouth = subtract(mouth, rectangle(-10,10,-2,10))
face = subtract(face,mouth)

13. CAD  RALA

14. CAD  RALA (3D)

15. How to Make Anything with RALA
Spanning-tree method:
Perform depth-first search of spanning tree of target circuit
Use backtracking ability of stem-cell forwarding
More general, e.g., if no Hamiltonian path (or don’t want to find one) OR
AND OR
XOR
NAND OR

16. Hierarchical Construction
Exploit computational power to build structures faster, e.g., hierarchically
code = 3 * ( right + left + straight * stem(B) + wire(L,[F,B]) + null)

17. Regular Grid Construction
prefix = (right + stem(B) + forward * x) * (m − 1) + right + stem(B) + wire(B,R) + (wire(B,F) * (x − 1) + wire(B,[F,R])) * (m − 1)
+ (left + stem(B) + forward * y) * (n − 1) + left + stem(B) + wire(B,L)
+ (wire(B,F) * (y − 1) + wire(B,[F,L])) * (n − 1)
unit
unit
unit
Theorem: m × n array of x × y modules in time O(m + n + x y) vs. O(m n x y)
E.g. exploit regularity of memory, adder, shape
unit
unit
unit
unit
unit
unit
unit
unit
unit

18. Replication 81-bit string encodes universal replicator
code = right + right + left + stem(B) + wire(B,[F,L]) + wire(R,L) + forward + forward
Replication
81-bit string encodes universal replicator
Replicates given program infinitely
~polymerase+ribosome
replicator
stem
program
copy

19. Cellular Automata Conway’s Game of Life is Turing-complete
alive = (2 ≤ num_live_neighbors ≤ 3)
Conway’s Game of Life is Turing-complete
Gosper’s Glider Gun
17141647 Turing machine

20. 1966

23. RALA vs. Cellular Automata
Logic automaton:
Designed for digital Boolean logic
Easy to implement standard circuits
Asynchronous:
Cellular automata require global clock
Impractical/slow for large sizes
Reconfigurable:
Stem cell converts data into programs
vs. von Neumann gates: enable replication but not obviously universal “ribosome”

24. Programmable Matter via RALA
Cell = one-bit computer (gate) & one unit of physical space
Communicates with neighbors
Request new cell on bare face
 Can grow a shape
Convergence of shape, computation, and communication

25. RALA: Convergence of Shape, Computation, & Communication
New model for mixing computation, data, program, & shape (state = space = time = logic)
Theoretically interesting
Parallel in a new way
Computation embedded into geometry
Programs that generate programs (and so on) opens new doors for construction, encoding, …
Practically interesting
Physically realistic (pay for transportation)
Easy to build (next)

26. Reconfigurable Asynchronous Logic Automata1 x
[Dalrymple, Demaine, Gershenfeld 2009]
stem
wire
XOR
crossover
space
= time
= state
= logic OR
delete
NAND
copy
ps vs. fs/μ
 ns/mm
AND
wire

27. Reconfigurable Asynchronous Logic Automata
stem
(RALA)
wire
XOR
crossover OR
delete
David Dalrymple
Erik Demaine
Neil Gershenfeld
NAND
copy
AND
wire