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Published byFranklin Gregory Modified over 9 years ago
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CCB to OH Interface M.Matveev Rice University November 12, 2015 1
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~15 m cable from CCB with 40Mhz clock ~20 m HDMI cable 40MHz LVDS clock from CCB coming to J2-14 (pos) and J2-19 (neg) 40MHz LVDS clock coming from J1-14 to U11-14 (pos) and from J1-19 to U14-15 (neg) Recovered 40MHz clock from U11-13 OH v.2a HDMI Cable Test at Rice 2
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CCB Mezzanine Design Distributes 7 signals from the CSC Clock and Control Board (CCB) to six OH v.2b - 40MHz LHC clock (LVDS) - JTAG (TCK, TMS, TDI, TDO) signals (LVDS) - Hard Reset (500 ns pulse, LVTTL) - JTAG control to OH multiplexor (CCB or GBT) Schematic is ready, sent to Yifan, Jason, Gilles for comments/suggestions/corrections. Who else is interested? Need to verify for consistency with the OH v.2b. How to proceed? How many modified CCBs will be needed in 2016? 3
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