1. Operand Addressing And Instruction Representation Tutorial 3

2. Addressing Modes

4. One, Two, Three-Address Machines – Consider how the C expression A = B*C + D might be evaluated by each of the one, two, and three-address instruction types. – Assumptions: Addresses and data words are two bytes in size. Opcodes are 1 byte in size. Operands are moved to and from memory one word (two bytes) at a time. – Three-Address Instructions: In a three-address instruction, the expression A = B*C + D might be coded as: –multB, C, A –addD, A, A which means multiply B by C and store the result at A Then, add D to A and store the result at address A.

5. One, Two, Three-Address Machines – Two Address Instructions: In a two-address instruction, one of the operands is overwritten by the result. Here, the code for the expression A = B*C + D is: – loadB, A – multC, A – addD, A

6. One, Two, Three-Address Machines – One Address (Accumulator) Instructions: A one-address instruction employs a single arithmetic register in the CPU, known as the accumulator. The code for the expression A = B*C + D is now: – load B – multC – addD – storeA – The load instruction loads B into the accumulator, mult multiplies C by the accumulator and stores the result in the accumulator, and add does the corresponding addition. The store instruction stores the accumulator in A.

7. One, Two, Three-Address Machines Evaluate the expression Z= (X*Y)+(W*Z) For 3address, 2 address, 1 address and 0 address instructions

8. Three Address Operands 3 Address operands (first operand is the destination) Using the 3 address instructions the code to evaluate the expression for Z is written as:- Mult R1, X, Y Mult R2, W, u Add Z, R2, R1

9. Two address Instruction When using two address instructions, one address specifies a register the other operand can be a register or a memory location. Load R1, X Mult R1, Y Load R2, W Mult R2, U Add R1, R2 Store Z, R1

10. One Address Instruction The Accumulator is assumed as a destination in One Address instruction Load X Mult Y Store Temp Load W Mult U Add Temp Store Z

11. Zero Address Instruction Stack based Architectures use no operands for instructions such as Add, Sub, Mult or Divide. Push X Push Y Mult Push W Push U Mult Add Pop Z

12. One, Two, Three-Address Machines Show the programs to execute Y= (A-B)/[C+(D*E)] on One address, two Address and Three Address operand Instructions Three Address Instruction: SUB Y, A, B Y  A-B MULT T, D, E T<- D*E ADD T, T,C T  T+C DIV Y, Y, T Y  Y/T

13. Two Address Instruction MOV Y, A Y  A SUB Y, B Y  Y-B MOV T, D T  D MULT T, E T  T*E ADD T, C T  T+C DIV Y, T Y  Y/D

14. One Address Instruction LOAD D AC  D MULT E AC  ACXE ADD C AC  AC+C STORE Y Y  AC LOAD A AC  A SUB B AC  AC-B DIV Y AC  AC/Y STORE Y Y  AC