1. Collaboration for Astronomy Signal Processing and Electronics Research

2. 10 gigabit Ethernet Introduction to Simulink 400 MHz Bandwidth Spectrometer 4 input FX Correlator Schedule Morning: Afternoon: High level talks, background, science and extant instrument discussion Hands-on tutorials (room 1301), small group whiteboard discussions

3. ROACH I Board

4. Interface to high speed analog to digital conversion

5. ROACH I Board Interface to high speed analog to digital conversion High speed IO (10 gigabit Ethernet)

6. ROACH I Board Interface to high speed analog to digital conversion PowerPC microprocessor High speed IO (10 gigabit Ethernet)

7. ROACH I Board FPG A Interface to high speed analog to digital conversion PowerPC microprocessor High speed IO (10 gigabit Ethernet)

8. ✴ FPGA stands for Field Programmable Gate Array - FPGAs consist of a collection of reprogrammable digital logic elements ✴ The first commercially available FPGA was introduced in 1985. ✴ Common applications include telecommunications, cryptography, image processing, defense systems, etc.. What is an FPGA?

9. ✴ The first commercially available FPGA was introduced in 1985. ✴ Common applications include telecommunications, cryptography, image processing, defense systems, etc.. What is an FPGA? ✴ FPGA stands for Field Programmable Gate Array - FPGAs consist of a collection of reprogrammable digital logic elements

10. Programming FPGAs Traditionally done with hardware description languages, e.g. Verilog, VHDL

11. ‣ Addition and Subtraction in C x = a + b; Programming FPGAs Traditionally done with hardware description languages, e.g. Verilog, VHDL

12. module addsub (a, b, addnsub, result);input [7:0] a;input [7:0] b;input addnsub;output[8:0] result;reg[8:0] result;always @(a or b or addnsub) beginif (addnsub) result = a + b;else result = a - b;endendmodule ‣ Addition and Subtraction in Verilog ‣ Addition and Subtraction in C x = a + b; Programming FPGAs Traditionally done with hardware description languages, e.g. Verilog, VHDL

13. HDL Code Logic Synthesis Binary FPGA Programming Instructions (Bitstream) Place and Route

16. Code Generation Simulink Diagram HDL Code Logic Synthesis Binary FPGA Programming Instructions (Bitstream) Download to ROACH Place and Route

30. ‘Real’ dual 400MHz BW 16k spectrometer for ROACH Mark Wagner / Lincoln Greenhill

33. Up Next: Tutorial #1 An Introduction to Simulink and the CASPER Toolflow