1. Circuit Minimization

2. Multiple-Output Minimization
We can always handle a circuit with n outputs as n independent single-output design problems.
We can also find a pair of sum-of-products expressions that share a product term, such that resulting circuit has one fewer gate than our original design.
Product-term sharing obviously reduces circuit size and cost.

3. Multiple-Output Minimization

4. Multiple-Output Minimization

5. Quine-McCluskey algorithm
This process can be made into a program, using appropriate algorithms and data structures.
Guaranteed to find “minimal” solution
Required computation has exponential complexity (run time and storage)-- works well for functions with up to 8-12 variables, but quickly blows up for larger problems.
Heuristic programs (e.g., Espresso) used for larger problems, usually give minimal results.

6. Lots of possibilities
Can follow a “dual” procedure to find minimal products of sums (OR-AND realization)
Can modify procedure to handle don’t-care input combinations.
Can draw Karnaugh maps with up to six variables.

7. Real-World Logic Design
Lots more than 6 inputs -- can’t use Karnaugh maps
Design correctness more important than gate minimization
Use “higher-level language” to specify logic operations
Use programs to manipulate logic expressions and minimize logic.
PALASM, ABEL, CUPL -- developed for PLDs
VHDL, Verilog -- developed for ASICs

8. ABEL Advanced Boolean Equation Language
Developed for use with programmable logic devices, which have a programmable AND-OR structure.
Combinational logic functions
Operators:
Sets:
Relations:
Intermediate variables
AND, OR, NOT, XOR, XNOR
& # ! $ !$
XBUS = [X3,X2,X1,X0];
XBUS = [1,1,0,1];
XBUS = 13;
(XBUS == YBUS)
(XBUS > [1,1,0,1])

9. ABEL Program Structure

10. ABEL Example

11. ABEL Example (continued)

12. ABEL language processor (compiler)
Checks syntax
Checks device-pin capabilities
Expands language statements and equations
Reduces equations into sum-of-products form form for programmable logic device (PLD)
Checks test vectors against equations
Checks equation requirements (# of inputs, product terms) against PLD resources
Determines “fuse map” to program the PLD

13. ABEL equations (.eq3) file

14. ABEL equations file (continued)

15. ABEL WHEN Statements

16. Nested WHEN statements
Note: different variables can be used in different THEN and ELSE clauses

17. Next time
PLDs (target of ABEL programs)
Documentation standards