1. A commercially available digitization system Fotiou Andreas Andreas Fotiou

2. 2  General features  Technical measurements  Tests with Optical Modules  Conclusions

3. 3 Key features of BenNUEY Card Key features of BenNUEY Card Up to 12 channels with12-bit 250MSPS analog capture per channel. 64-bit/33MHz PCI Interface. Four Gigabit Ethernet ports with dedicated Quad PHY device. 8 Mbytes of ZBT Memory. Low consumption.

4. 4 BenNUEY Functional Diagram By Nallatech company

5. 5 Key features of BenADC card Key features of BenADC card Quad 12-bit 250MSPS analog capture channels. On-board Xilinx Virtex-4 User FPGA (supporting SX55, LX100 or LX160). ±725 mV maximum input signal range. Two dedicated onboard module oscillators: –200 and 250 MHz Oscillators. External clock input. 16MBytes of DDR-II SRAM.

6. 6 BenADC Physical Layout (Top) By Nallatech company

7. 7 BenADC Physical Layout (Bottom) By Nallatech company

8. 8 BenNUEY Physical Layout (Top) By Nallatech company

9. 9 BenNUEY Physical Layout (Bottom) By Nallatech company

10. 10 The clock management system By Nallatech company

11. 11  General features  Technical measurements  Tests with Optical Modules  Conclusions

12. 12 Type of measurements Type of measurements Distortion measurements - Amplitude distortion - Rise time distortion Power consumption measurements  The host of the system was a pentium m based PC.

13. 13 Block diagram of the setup  Negative triangular pulses of various amplitudes with 17ns FWHM were used.

14. 14 Amplitude distortion Amplitude distortion

15. 15 Rise time distortion

16. 16 System Power Consumption Status Card Consumption (Watt) Idle mode 9 1 card sampling (4 CH) 37 2 cards sampling (8 CH) 48 3 cards sampling (12 CH) 59* * Estimated value

17. 17  General features  Technical measurements  Tests with Optical Modules  Conclusions

18. 18 A trigger algorithm has been implemented in VHDL. The basic parameters are:  Threshold  Coincidence window  Majority  Total recording time  Pro-event recording time Most of the parameters can change via software (Tcl, C). Coincidence window length requires firmware modifications. Trigger implementation

19. 19 Coincidence window: 60 ns (15 samples). Total recording time: 512 ns (128 samples). Pro-event recording time: 64ns (16 samples). Different majority number and threshold levels were applied. Test run parameters

20. 20 Majority 2, threshold -30 mV

21. 21 Majority 3, threshold -30 mV

22. 22 Majority 4, threshold -30 mV

23. 23 Majority 2, threshold -120 mV

24. 24 Majority 3, threshold -120 mV

25. 25  General features  Technical measurements  Tests with Optical Modules  Conclusions

26. 26 Conclusions Conclusions Simultaneous 12-channel 250MSPS continuous digitizing system Dead time free between triggers Less than 15% distortion in rise time and less than 3% in amplitude Low power consumption

27. 27 Thanks Thanks  Special thanks to the Nallatech company, which loaned us this card for 3 months.  Company’s website: www.nallatech.com