1. 1 Virtual Memory (I)

2. 2 Outline Physical and Virtual Addressing Address Spaces VM as a Tool for Caching VM as a Tool for Memory Management VM as a Tool for Memory Protection Suggested reading: 9.1~9.5

3. 3 Physical Addressing Attributes of the main memory –Organized as an array of M contiguous byte-sized cells –Each byte has a unique physical address (PA) started from 0 physical addressing –A CPU use physical addresses to access memory Examples –Early PCs, DSP, embedded microcontrollers, and Cray supercomputers

4. 4 A System Using Physical Addressing Used in “simple” systems like embedded microcontrollers in devices like cars, elevators, and digital picture frames 0: 1: M-1: Main memory CPU 2: 3: 4: 5: 6: 7: Physical address (PA) Data word 8:... 4

5. 5 Virtual Addressing Virtual addressing –the CPU accesses main memory by a virtual address (VA) The virtual address is converted to the appropriate physical address

6. 6 Virtual Addressing Address translation –Converting a virtual address to a physical address –Requires close cooperation between the CPU hardware and the operating system HW: the memory management unit (MMU) –Dedicated hardware on the CPU chip to translate virtual addresses on the fly SW: A look-up table –Stored in main memory –Contents are managed by the operating system

7. 7 A System Using Virtual Addressing Used in all modern servers, desktops, and laptops One of the great ideas in computer science 0: 1: M-1: Main memory MMU 2: 3: 4: 5: 6: 7: Physical address (PA) Data word 8:... CPU Virtual address (VA) CPU Chip 4 4100

8. 8 Address Space –An ordered set of nonnegative integer addresses Linear Space –The integers in the address space are consecutive Linear address space: Ordered set of contiguous non-negative integer addresses: {0, 1, 2, 3 … }

9. 9 Address Space N-bit Address Space –Virtual address space: Set of N = 2 n virtual addresses {0, 1, 2, 3, …, N-1} –Physical address space: Set of M = 2 m physical addresses {0, 1, 2, 3, …, M-1} Clean distinction between –data (bytes) and their attributes (addresses) Each object can now have multiple addresses –one physical address, one (or more) virtual addresses

10. 10 Address Space K=2 10 (Kilo), M=2 20 (Mega), G=2 30 (Giga), T=2 40 (Tera), P=2 50 (Peta), E=2 60 (Exa) #virtual address bits (n) #virtual address (N) Largest possible virtual address 8 64K 32 256T 64 256 255 1664K-1 4G4G-1 48 16E16E-1 256T-1

11. Why Virtual Memory (VM)? Uses main memory efficiently –Use DRAM as a cache for the parts of a virtual address space Simplifies memory management –Each process gets the same uniform linear address space Isolates address spaces –One process can’t interfere with another’s memory –User program cannot access privileged kernel information

12. 12 Using Main Memory as a Cache DRAM SRAM Disk

13. 13 Using Main Memory as a Cache DRAM vs. disk is more extreme than SRAM vs. DRAM –Access latencies: DRAM ~10X slower than SRAM Disk ~100,000X slower than DRAM –Bottom line: Design decisions made for DRAM caches driven by enormous cost of misses

14. 14 Design Considerations Line size? (Large vs. Small) –Large, since disk better at transferring large blocks Associativity? (Full vs. Direct) –Full, to minimize miss rate Write through or write back? (WB vs. WT) –Write back, since can’t afford to perform small writes to disk

15. 15 Page Virtual memory –Organized as an array of contiguous byte-sized cells stored on disk conceptually. –Each byte has a unique virtual address that serves as an index into the array –The contents of the array on disk are cached in main memory

16. 16 Page The data on disk is partitioned into blocks –Serve as the transfer units between the disk and the main memory –virtual pages (VPs) –physical pages (PPs) or page frames PP 2 m-p -1 Physical memory Empty Uncached VP 0 VP 1 VP 2 n-p -1 Virtual memory Unallocated Cached Uncached Unallocated Cached Uncached PP 0 PP 1 Empty Cached 0 N-1 M-1 0 Virtual pages (VPs) stored on disk Physical pages (PPs) cached in DRAM

17. 17 Page Attributes Unallocated: –Pages that have not yet been allocated (or created) by the VM system –Do not have any data associated with them –Do not occupy any space on disk.

18. 18 Page Attributes Cached: –Allocated pages that are currently cached in physical memory. Uncached: –Allocated pages that are not cached in physical memory.

19. 19 Page Table Each allocate page of virtual memory has entry in page table Mapping from virtual pages to physical pages –From uncached form to cached form Page table entry even if page not in memory –Specifies disk address OS retrieves information

20. 20 Page Table Data 243 17 105 0: 1: N-1: X Object Name Location D: J: X:1 0 On Disk “Cache”Page Table

21. 21 Page Table NULL Memory resident page table (physical page or disk address) Physical Memory Disk Storage (swap file or regular file system file) Valid 1 1 0 1 1 1 1 0 0 0 Virtual Page Number PTE0 PTE9 PP0 PP5 VP4 VP1 VP2

22. 22 Page Hits Memory Address Translation: Hardware converts virtual addresses to physical addresses via an OS-managed lookup table (page table) CPU 0: 1: N-1: 0: 1: P-1: Page Table Disk Virtual Addresses Physical Addresses

23. 23 Page Faults Page table entry indicates virtual address not in memory OS exception handler invoked to move data from disk into memory –current process suspends, others can resume –OS has full control over placement, etc.

24. 24 Page Faults Swapping or paging Swapped out or paged out Demand paging CPU Memory Page Table Disk Virtual Addresses Physical Addresses CPU Memory Page Table Disk Virtual Addresses Physical Addresses Before fault After fault

25. 25 Servicing a Page Fault Processor Signals Controller –Read block of length P starting at disk address X and store starting at memory address Y disk Disk disk Disk Memory-I/O bus Processor Cache Memory I/O controller I/O controller Reg (1) Initiate Block Read

26. 26 Servicing a Page Fault Read Occurs –Direct Memory Access (DMA) –Under control of I/O controller disk Disk disk Disk Memory-I/O bus Processor Cache Memory I/O controller I/O controller Reg (2) DMA Transfer

27. 27 Servicing a Page Fault I / O Controller Signals Completion –Interrupt processor –OS resumes suspended process disk Disk disk Disk Memory-I/O bus Processor Cache Memory I/O controller I/O controller Reg (3) Read Done

28. Locality to the Rescue Again! Virtual memory works because of locality At any point in time, programs tend to access a set of active virtual pages called the working set –Programs with better temporal locality will have smaller working sets

29. Locality to the Rescue Again! If (working set size < main memory size) –Good performance for one process after compulsory misses If ( SUM(working set sizes) > main memory size ) –Thrashing: Performance meltdown where pages are swapped (copied) in and out continuously

30. Why Virtual Memory (VM)? Uses main memory efficiently –Use DRAM as a cache for the parts of a virtual address space Simplifies memory management –Each process gets the same uniform linear address space Isolates address spaces –One process can’t interfere with another’s memory –User program cannot access privileged kernel information

31. VM as a Tool for Memory Management Key idea: each process has its own virtual address space –It can view memory as a simple linear array Virtual Address Space for Process 1: Physical Address Space (DRAM) 0 N-1 (e.g., read-only library code) Virtual Address Space for Process 2: VP 1 VP 2... 0 N-1 VP 1 VP 2... PP 2 PP 6 PP 8... 0 M-1 Address translation

32. VM as a Tool for Memory Management Memory allocation –Each virtual page can be mapped to any physical page –A virtual page can be stored in different physical pages at different times Virtual Address Space for Process 1: Physical Address Space (DRAM) 0 N-1 (e.g., read-only library code) Virtual Address Space for Process 2: VP 1 VP 2... 0 N-1 VP 1 VP 2... PP 2 PP 6 PP 8... 0 M-1 Address translation

33. VM as a Tool for Memory Management Sharing code and data among processes –Map virtual pages to the same physical page (e.g. PP 6) Virtual Address Space for Process 1: Physical Address Space (DRAM) 0 N-1 (e.g., read-only library code) Virtual Address Space for Process 2: VP 1 VP 2... 0 N-1 VP 1 VP 2... PP 2 PP 6 PP 8... 0 M-1 Address translation

34. Simplifying Linking and Loading Linking –Each program has similar virtual address space –Code, stack, and shared libraries always start at the same address Kernel virtual memory Memory-mapped region for shared libraries Run-time heap (created by malloc ) User stack (created at runtime) Unused 0 %esp (stack pointer) Memory invisible to user code brk 0xc0000000 0x08048000 0x40000000 Read/write segment (. data,. bss ) Read-only segment (.init,. text,.rodata ) Loaded from the executable file

35. Simplifying Linking and Loading Loading –execve() allocates virtual pages for.text and.data sections = creates PTEs marked as invalid –The.text and.data sections are copied, page by page, on demand by the virtual memory system Kernel virtual memory Memory-mapped region for shared libraries Run-time heap (created by malloc ) User stack (created at runtime) Unused 0 %esp (stack pointer) Memory invisible to user code brk 0xc0000000 0x08048000 0x40000000 Read/write segment (. data,. bss ) Read-only segment (.init,. text,.rodata ) Loaded from the executable file

36. Why Virtual Memory (VM)? Uses main memory efficiently –Use DRAM as a cache for the parts of a virtual address space Simplifies memory management –Each process gets the same uniform linear address space Isolates address spaces –One process can’t interfere with another’s memory –User program cannot access privileged kernel information

37. VM as a Tool for Memory Protection Extend PTEs with permission bits –The same physical page has different permission for different process Process i: AddressREADWRITE PP 6YesNo PP 4Yes PP 2Yes VP 0: VP 1: VP 2: Process j: Yes SUP No Yes AddressREADWRITE PP 9YesNo PP 6Yes PP 11Yes SUP No Yes No VP 0: VP 1: VP 2: Physical Address Space PP 2 PP 4 PP 6 PP 8 PP 9 PP 11

38. VM as a Tool for Memory Protection Page fault handler checks these before remapping –If violated, send process SIGSEGV (segmentation fault) Process i: AddressREADWRITE PP 6YesNo PP 4Yes PP 2Yes VP 0: VP 1: VP 2: Process j: Yes SUP No Yes AddressREADWRITE PP 9YesNo PP 6Yes PP 11Yes SUP No Yes No VP 0: VP 1: VP 2: Physical Address Space PP 2 PP 4 PP 6 PP 8 PP 9 PP 11