1. Lecture 2: Limiting Models of Instruction Obeying Machine 虞台文 大同大學資工所 智慧型多媒體研究室

2. Content Machine Simulation and Equivalence Unlimited-Register Machine

3. Lecture 2: Limiting Models of Instruction Obeying Machine Machine Simulation and Equivalence 大同大學資工所 智慧型多媒體研究室

4. Computer as a Partial Function M  a machine   an M -program  an encoding function  a decoding function e d input output

5. Computer as a Partial Function e d input output A partial function

6. Machine Equivalence Input ( X ) Output ( Y )

7. Machine Equivalence Input ( X ) Output ( Y )

8. Machine Equivalence Input ( X ) Output ( Y )

9. Machine Equivalence Input ( X ) Output ( Y )

10. Machine Equivalence Input ( X ) Output ( Y )

11. Machine Equivalence Defined two machines M 1 -program M 2 -program Memory sets of M 1 and M 2. g h  g, h such that

12. Machine Equivalence Defined g h  g, h such that Let can be computed on M 1 using , i.e., f can be computed on M 2 using  ’, with encoding function decoding function

13. Machine Simulation Defined A machine M 2 simulates M 1 if such that we can specify an algorithm which given any program  produces  ’ satisfying

14. Machine Simulation Defined A machine M 2 simulates M 1 if such that we can specify an algorithm which given any program  produces  ’ satisfying Problems: 1.What is the algorithm? 2.How to find g and h ?

15. Theorem A machine M 2 simulates M 1 if such that we can specify an algorithm which given any program  produces  ’ satisfying The memory encoder g has to be one to one. M 2 simulates M 1

16. Theorem Consider Pf) STARTHALT :: Identity The memory encoder g has to be one to one. M 2 simulates M 1 Suppose that g is not one to one. Then, g(m 1 ) = g(m 2 ) = M for some m 1  m 2. M 2 simulates M 1

17. Stepwise Simulation M 2 stepwise simulates M 1 if  1-to-1 encoding function g:M 1  M 2 such that 1) For each F  F, 2) For each P  P, F : the set of operation functions of M 1. P : the set of predicates of M 1.  a program  F in M 2 such that  a program  P in M 2 such that and  P doesn’t change M 2.

18. Stepwise Simulation M 2 stepwise simulates M 1 if  1-to-1 encoding function g:M 1  M 2 such that 1) For each F  F, 2) For each P  P, F : the set of operation functions of M 1. P : the set of predicates of M 1.  a program  F in M 2 such that  a program  P in M 2 such that and  P doesn’t change M 2.

19. Stepwise Simulation M 2 stepwise simulates M 1 if  1-to-1 encoding function g:M 1  M 2 such that 1) For each F  F, 2) For each P  P, F : the set of operation functions of M 1. P : the set of predicates of M 1.  a program  F in M 2 such that  a program  P in M 2 such that and  P doesn’t change M 2. P truefalse truefalse PP

20. Stepwise Simulation M 2 stepwise simulates M 1 M 2 simulates M 1

21. SR 4 Memory set  4 registers (x 1, x 2, x 3, x 4 ) OperationsPredicates for i = 1, 2, 3, 4.

22. Review PC Memory set  2 registers (x, y) Operations Predicates Does PC Simulates SR 4 ? Does SR 4 Simulates PC?

23. Prove PC Simulates SR4 Step 1: Step 2: Step 3: Define a 1-to-1 encoding function For each F  F SR4, find a  F on PC such that … For each P  P SR4, find a  P on PC such that … To be shown Exercise

24. SR 4 PC

25. START false true false HALT true

26. Exercise

27. HALT START 2 | x? y  x x  0 truefalse START false true false FALSE HALT TRUE HALT 2 | x?

28. Prove PC Simulates SR4 Step 1: Step 2: Step 3: Define a 1-to-1 encoding function For each F  F SR4, find a  F on PC such that … For each P  P SR4, find a  P on PC such that … To be shown Exercise In fact, SR 2 also simulates SR 4. Why?

29. Discussion PC SR 4 SR 2 SR  Is SR  more powerful than SR 2 ?No. Is SR  more powerful than PC?Not sure, now.

30. Lecture 2: Limiting Models of Instruction Obeying Machine Unlimited-Register Machine 大同大學資工所 智慧型多媒體研究室

31. The Unlimited-Register Machine Unlimited number of registers. Unbounded capacity of every register. Powerful instructions

32. The Machine R Memory set Operations Predicates That is, for some, k  1, n i = 0 for all i  k (finite memory are used).

33. Input & Output Registers of R k input registers l output registers Other registers can be working registers if necessary.

34. Running R  : a program in R e : encoder d : decoder

35. SR  Memory set  The same as R Operations & Predicates i = 1, 2, …

36. Machine Simulations SR  R Simulates? Of course. Not sure, now.

37. Prove SR  Simulates R Step 1: Step 2: Step 3: w working registers

38. Prove SR  Simulates R Step 1: Step 2: Step 3: w working registers Converted to register-mode operation by using a working register.

39. Prove SR  Simulates R  START HALT >=>= START TRUE HALT FALSE HALT true false

40. Prove SR  Simulates R HALT START y  x k y>0 ? x i  0 x i  x i + x j true false y  y  1 HALT START y  x j x k >0 ? x i  0 y  y  xky  y  xk true false x k >y ? y  0 true false x i  x i + 1

41. Prove SR  Simulates R HALT START y  x k y>0 ? x i  x j true false x i  x i + 1 y  y  1 HALT START y  x k y>0 ? x i  x j true false x i  x i  1 y  y  1

42. Prove SR  Simulates R HALT START y  0 x j >0? x i  0 true false x j  x j  1 x i  x i + 1 y  y + 1 y>0? true x j  x j + 1 y  y  1 false HALT START y  x i + x j x i  y y  0

43. Prove SR  Simulates R START y  x i  x j y>0 ? true TRUE HALT FALSE HALT false START false TRUE HALT FALSE HALT true x j > x i ? x i > x j ? false

44. Exercise Using SR  to Simulate R, at least how many working registers are required?

45. Discussion PC SR 4 SR 2 SR  R

46. Discussion Machine equivalence is reflexive, symmetric, and transitive, i.e., an equivalence relation. SR 2 is the same powerful as R. To study computation, considering PC, SR 2, SR 4, SR or R is equally well. The above machines are register machines.

47. Register Functions Use x 1, …, x k as input registers of R. Let f i : N k  N be the function computed by an R - program  using x i as the output register. We call the k functions f 1, …, f k the ( k -adic) register functions of . We will considered register functions (the class of all k -adic, k  1, register functions) to be functions that are computable by R.

48. Examples START x 1  x 3  5 x 2  x 1 + x 3 HALT