1. CH.3 Floating Point Hardware and Algorithms 2/18/2016 1

2. Review 2/18/2016 2 Adder gate level diagram Adder Verilog module Processing Verilog files using Icarus Verilog Simulation verilog module definition using vvp Floating point representation

3. Adder Circuit 2/18/2016 3 Adder (a,b,cin)  s, cout s = ? cout = ?

4. Processing Verilog File 2/18/2016 4 Icarus Verilog, vvp are the tools available on cse machines Icarus Verilog compiler: iverilog iverilog is a compiler that translates Verilog source code into executable programs for simulation, or other netlist formats for further processing. The currently supported targets are vvp for simulation vvp is the run time engine that executes the default compiled form generated by Icarus Verilog. The output from the iverilog command is not by itself executable on any plat form. Instead, the vvp program is invoked to execute the generated output file.

5. Using the Verilog Compiler and Runtime 2/18/2016 5 Design your Verilog module according to the specification given  For adder, lets say we have saved the verilog module design in “adder.v” Compile the module definition into a form that can be executed by vvp runtime.  iverilog -o adder adder.v  Output of iverilog command is stored in file “adder” Run the code to check the output, that is typically generated by the tester code.  vvp adder You will see the output on the screen You can also capture into a file to submit it or print it.

6. Floating point numbers 2/18/2016 6 Why do we need them? To represent very large number and very small number. To represent a larger range of number with a given size in bits. Consider a 4 bit container Consider a 8 bit container Examples: An astronautical unit (Au)is the distance between the earth and the sun in meters. 150,000,000,000 meters Size of Helium atom: 1 angstrom: 10 -10 meters See more details on units of measurement hereunits of measurement here

7. FP Representation 2/18/2016 7 SExponentFraction Value = (-1) S X F X 2 E 32 bit single precision 64 bit double precision IEEE 754 format

8. FP Addition and Multiplication 2/18/2016 8 Components: operands, ALU, control, comparison, shifters, normalize, round Control ALUs Figures: 3.17, 3.16, 3.18

9. Nothing is simple (IEEE 754) Consider the representation of real number. Eg.: -56.731 or -0.4539 Lets see how we can go from this human readable form to IEEE 754  Goals: you want to represent as large a range as possible  You want to include features that will optimize processing Exponent, fraction, sign of exponent, sign of fraction -56.731 or -0.4539  -0.56731 X 10 2 -0.4539 X 10 0 2/18/2016 9 02156731

10. Binary Representation Now lets look at binary representation Eg. 0.00001010 X 2 3 -0.0000000 X 2 -4 How will you add these numbers? How will you multiply these? When you answer these questions, you find that it will help to have the numbers in (i) fractional form, (ii) normalized, and (iii) exponents mapped to a positive range by adding a bias. Also it is possible to represent a larger range by implying the leading 1 in the normalized fraction and a single zero. 2/18/2016 10

11. IEE754 Format A floating point number will be represented by a normalized fraction with implied leading 1, biased exponent mapped onto a positive range (no sig needed) and only sign bit is for the entire number. In other words: Fp = (S, fraction, biased E) is equivalent (-1) S X (1 + fraction) X 2 (E-bias) Hwk4: 3.42, 3.44 Due: 2/25 2/18/2016 11

12. Floating Point Operation: Addition Now lets look at floating point arithmetic unit. We will examine only addition. 2/18/2016 12