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Penn ESE370 Fall2014 -- DeHon 1 ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems Day 23: October 24, 2014 Pass Transistor Logic:

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Presentation on theme: "Penn ESE370 Fall2014 -- DeHon 1 ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems Day 23: October 24, 2014 Pass Transistor Logic:"— Presentation transcript:

1 Penn ESE370 Fall2014 -- DeHon 1 ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems Day 23: October 24, 2014 Pass Transistor Logic: part 2 (Cascading without Buffers)

2 Previously Penn ESE370 Fall2014 -- DeHon 2

3 Two XOR Gates Penn ESE370 Fall2014 -- DeHon 3

4 Today Pass Transistor Circuit –Output levels –Cascading Series pass transistors? Delay Start on Distributed RC –Analyzing delay for pass-tr designs Penn ESE370 Fall2014 -- DeHon 4

5 Cascading Pass Transistors Penn ESE370 Fall2014 -- DeHon 5

6 Chain without Inverters What if we did this? Penn ESE370 Fall2014 -- DeHon 6

7 Extract key path Penn ESE370 Fall2014 -- DeHon 7

8 t=0 (after Vin transition 1  0) Penn ESE370 Fall2014 -- DeHon 8

9 t=4  (after Vin transition 1  0) Penn ESE370 Fall2014 -- DeHon 9

10 t=∞ (after Vin transition 1  0) Penn ESE370 Fall2014 -- DeHon 10

11 Focus on Pass tr Vgs? Operation mode? Current flow? Penn ESE370 Fall2014 -- DeHon 11

12 Voltage of Chain What is voltage at output? Penn ESE370 Fall2014 -- DeHon 12

13 How compare Compare Penn ESE370 Fall2014 -- DeHon 13

14 DC Analysis Penn ESE370 Fall2014 -- DeHon 14

15 DC Analysis – chain of 6 Penn ESE370 Fall2014 -- DeHon 15

16 Conclude Can chain any number of pass transistors and only drop a single Vth Penn ESE370 Fall2014 -- DeHon 16

17 Transient Penn ESE370 Fall2014 -- DeHon 17

18 Closeup Penn ESE370 Fall2014 -- DeHon 18

19 Inverter Sense Penn ESE370 Fall2014 -- DeHon 19

20 Capacitance What is Capacitance per stage (@y)? Penn ESE370 Fall2014 -- DeHon 20

21 Delay Setup What does RC circuit look like? Penn ESE370 Fall2014 -- DeHon 21

22 Pass TR Tree What if we did this? Penn ESE370 Fall2014 -- DeHon 22

23 Path What’s different about this? Penn ESE370 Fall2014 -- DeHon 23

24 Gate Cascade? What are voltages? Penn ESE370 Fall2014 -- DeHon 24

25 Demonstration Circuit Penn ESE370 Fall2014 -- DeHon 25

26 SPICE TODO show spice results of voltages Penn ESE370 Fall2014 -- DeHon 26

27 Demonstration Chain Penn ESE370 Fall2014 -- DeHon 27

28 Spice Penn ESE370 Fall2014 -- DeHon 28

29 Transient Response Penn ESE370 Fall2014 -- DeHon 29

30 Conclude Cannot cascade degraded inputs into gates. Penn ESE370 Fall2014 -- DeHon 30

31 Distribute RC (setup) Time Permitting Penn ESE370 Fall2014 -- DeHon 31

32 What is response? Penn ESE370 Fall2014 -- DeHon 32

33 What is response? Penn ESE370 Fall2014 -- DeHon 33

34 What is response? Penn ESE370 Fall2014 -- DeHon 34

35 SPICE Response Penn ESE370 Fall2014 -- DeHon 35

36 Intuition Look at series of R’s on path –Must move Q=V(  C) across each R Not as much as if both R’s precede C’s Penn ESE370 Fall2014 -- DeHon 36

37 Idea There are other circuit disciplines Can use pass transistors for logic –Even chains of pass transistors –Sometimes gives area or delay win Do not cascade as easily as CMOS Penn ESE370 Fall2014 -- DeHon 37

38 Admin Project –Milestone 1 in –Will try to get feedback Friday evening/Sat. –Should be working hard on project –Rewarding experience Penn ESE370 Fall2014 -- DeHon 38


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