1. PC Instruction Memory Address Instr. [31-0] 4 Fig 4.6 p 309 Instruction Fetch

2. Data Memory Address Data Write data Read Write

3. Registers Read reg 1 Read reg 2 Write reg Write data Read data 1 Read data 2 MUX 0 1 Sign Ext ALU result zero 32 16 Instr [15-0] MUX 0 1 Instr [15-11] (rd) Instr [20-16] (rt) Instr [25-21] (rs) Instr [5-0] ALU Ctrl From figures 4.7, 4.8 pp 310-311. Registers and ALU

4. Instr[31-26] Control RegDst Branch MemRead MemToReg ALUOp MemWrite ALUSrc RegWrite

5. PC Instruction Memory Address Instr. [31-0] Add Registers Read reg 1 Read reg 2 Write reg Write data Read data 1 Read data 2 MUX 0 1 0 1 1 0 0 1 Shift Left 2 Sign Ext Data Memory Address Data Write data ALU result zero 32 16 Instr [5-0] Instr [15-0] 4 Instr[31-26] Instr [15-11] Instr [20-16] Instr [25-21] Control ALU Ctrl RegDst Branch MemRead MemToReg ALUOp MemWrite ALUSrc RegWrite Figure 4.17 p322

6. PC Instruction Memory Address Instr. [31-0] Add Registers Read reg 1 Read reg 2 Write reg Write data Read data 1 Read data 2 MUX 0 1 0 1 0 1 0 1 Shift Left 2 Sign Ext Data Memory Address Data Write data ALU result zero Control ALU Ctrl 32 16 Instr [5-0] Instr [15-0] 4 Instr[31-26] Instr [15-11] Instr [20-16] Instr [25-21]

7. PC Instruction Memory Address Instr. [31-0] Add Registers Read reg 1 Read reg 2 Write reg Write data Read data 1 Read data 2 MUX 0 1 0 1 0 1 0 1 Control Shift Left 2 Sign Ext ALU Ctrl Data Memory Address Data Write data ALU result zero