1. Logic Gates Ghader Kurdi Adapted from the slides prepared by DEPARTMENT OF PREPARATORY YEAR.

2. Introduction to Digital Logic Basics Hardware consists of a few simple building blocks  These are called logic gates AND, OR, NOT, … NAND, NOR, XOR, … Both the inputs and output to/from logic gates are expressed in terms of 1s and 0s Logic gate Performs logical operation outputInput/s

3. Design of Logic Gates The basic logic gates are:  AND  OR  NAND  NOR  XOR  XNOR  Inverter (NOT)  Buffer

4. Design of Logic Gates Logic gates are built using transistors NOT gate can be implemented by a single transistor AND requires 3 transistors Transistors are the fundamental devices that any electronic system consists of Pentium consists of 3 million transistors Compaq Alpha consists of 9 million transistors Now we can build chips with more than 100 million transistors

5. AND gate FBA 000 010 001 111 AND function finds the minimum between two binary digits AND gate outputs a 1 only if all the inputs are 1. Truth table Graphical representation F = A. B or F = AB Logical representation

6. OR gate FBA 000 110 101 111 Truth table F = A + B Logical representation OR finds the maximum between two binary digits OR gate outputs a 1 if any one of the inputs is1. Graphical representation

7. NAND gate FBA 100 110 101 011 NAND = AND + NOT The output is "false" if both inputs are "true." Otherwise, the output is "true." Truth table Graphical representation F = A. B Logical representation

8. NOR gate FBA 100 010 001 011 NOR = OR + NOT The output is "true" if both inputs are "false." Otherwise, the output is "false." Truth table Graphical representation F = A + B Logical representation

9. XOR gate FBA 000 110 101 011 XOR implements exclusive-OR function The output is "true" if either, but not both, of the inputs are "true." The output is "false" if both inputs are "false" or if both inputs are "true." Truth table Graphical representation A + B = A · B + A · B Logical representation

10. XNOR gate The output is true when both inputs A and B are true and when neither A nor B is true. FBA 100 010 001 111 Truth table Graphical representation A + B Logical representation

11. NOT (Inventer) gate FA 10 01 Has only one input Outputs the inverse of the value inputted Truth table Graphical representation F = A or A’ Logical representation

12. Buffer YA 00 11 Has only one input Outputs the same value inputted Truth table Graphical representation Y = A Logical representation

13. Integration levels  SSI (small scale integration) Introduced in late 1960s 1-10 gates (previous examples)  MSI (medium scale integration) Introduced in late 1960s 10-100 gates  LSI (large scale integration) Introduced in early 1970s 100-10,000 gates  VLSI (very large scale integration) Introduced in late 1970s More than 10,000 gates

14. Logic Functions Logical functions can be expressed in several ways:  Truth table  Logical expressions  Graphical form Example:  Majority function Output is 1 whenever majority of inputs is 1 We use 3-input majority function

15. Truth Table F….CBA 000 100 010 110 001 101 011 111 In a truth table, the number of rows = (number of inputs) 2 The truth table has a column foe each input on the left hand side The outputs are listed in columns on the right hand side

16. Logic Functions (cont.) 3-input majority function ABCFABCF 00100010 01000100 01110111 10001000 10111011 11011101 11111111 Logical expression form F = A B + B C + A C 000 0 0 0 0 0 0 0 0 0 0 000000 0

17. Logic Functions (cont.) Logical expression: Q= A’B + AB’ ABA’B’A’BAB’Q 00110011 01010101 11001100 10101010 01000100 00100010 01100110

18. Logic Circuit Design Process A simple logic design process involves  Problem specification  Truth table derivation  Derivation of logical expression  Simplification of logical expression  Implementation

19. Logical Equivalence All three circuits implement F = A B function

20. Logical Equivalence (cont.) Proving logical equivalence of two circuits 1. Derive the logical expression for the output of each circuit 2. Show that these two expressions are equivalent Two ways: You can use the truth table method For every combination of inputs, if both expressions yield the same output, they are equivalent Good for logical expressions with small number of variables You can also use algebraic manipulation Need Boolean identities

21. Logical Equivalence (cont.) A B A+B Derivation of logical expression from a circuit Trace from the input to output Write down intermediate logical expressions along the path

22. Logical Equivalence (cont.) Proving logical equivalence: Truth table method A B A B (A + B) F2 = (A + B) 00110011 01010101 11001100 10101010 11101110 00010001

23. Logical Equivalence (cont.) Derivation of logical expression from a circuit

24. Logical Equivalence (cont.) Proving logical equivalence: Truth table method A BF1 = A BF3 = (A + B) (A + B) (A + B) 0 0 0 1 0 0 1 0 0 0 1 1

25. The Universal NAND Gate NAND gate is the main fundamental universal gate for being easier in manufacturing process.

26. The Universal NAND Gate (cont.)

27. FBA 00 10 01 11 FBA 100 110 101 011 0 0 1 1 1 0 0

28. FBA 000 10 01 11 FBA 100 110 101 011 0 1 1 1 1 0 0

29. FBA 000 010 01 11 FBA 100 110 101 011 1 0 1 1 1 0 0

30. FBA 000 010 001 11 FBA 100 110 101 011 1 1 0 0 0 1 1

32. FA 0 1 FBA 100 110 101 011 0 0 1 1

33. FA 10 1 FBA 100 110 101 011 1 1 0 0

34. The Universal NOR Gate NOR gate is also another main fundamental universal gate

35. Deriving Logical Expressions Derivation of logical expressions from truth tables  sum-of-products (SOP) form  product-of-sums (POS) form SOP form  Write an AND term for each input combination that produces a 1 output Write the variable if its value is 1; complement otherwise  OR the AND terms to get the final expression POS form  Dual of the SOP form

36. Deriving Logical Expressions (cont.) 3-input majority function ABCF 0000 0010 0100 0111 1000 1011 1101 1111 SOP logical expression Four product terms  Because there are 4 rows with a 1 output F = A B C + A B C + A B C + A B C

37. Deriving Logical Expressions (cont.) 3-input majority function ABCF 0000 0010 0100 0111 1000 1011 1101 1111 POS logical expression Four sum terms  Because there are 4 rows with a 0 output F = (A + B + C) (A + B + C) (A + B + C) (A + B + C)

38. Boolean Algebra Boolean algebra can be used to formalize the combinations of binary logic states. In these relations A and B are binary quantities, they can be either logical true (T or 1) or logical false (F or 0).

39. Boolean Algebra

40. Boolean Algebra (cont.)

41. Logical Expression Simplification Prove that: A B = (A + B) (A + B) (A + B) Used rules (A + B) (A + B) (A + B)Distribution (A + BB) (A + B)Complement (A + 0) (A + B)Identity A (A + B)Distribution AA + ABComplement 0 + ABIdentity AB

42. Logical Expression Simplification Prove that: A B = (A + B) (A + B) (A + B) Used rules (A + B) (A + B) (A + B)Idempotent (A + B) (A + B) ((A + B) (A + B)) ((A + B) (A + B))Distribution (A + BB) (B + AA)Complement (A + 0) (B + 0) Identity (A)(B) AB

43. Logical Expression Simplification (cont.) Prove that: X+XY = X Used rules X+XYX+XY X(1+Y)Null X(1)Identity X

44. Logical Expression Simplification (cont.) Prove that: X(X+Y) = X Used rules X(X+Y)Distribution XX+XYIdempotent X+XYX+XY X(1+Y)Null X(1)Identity X

45. Logical Expression Simplification (cont.) Prove that: X.(Y+Z) = X.Y + X.Z Used rules X.Y + X.ZDistribution (X.Y + X) (X.Y + Z)Absorption X. (X.Y + Z)Distribution X. (Z+X. Z+Y)Associative (X. X+Z). (Y+Z)Absorption X. (Y+Z)

46. Logical Expression Simplification (cont.) Prove that: X(X+X') = X Used rules X(X+X')Distribution XX + XX’Idempotent X + XX’Complement X + 0Identity X

47. Logical Expression Simplification (cont.) Majority function example A B C + A B C + A B C + A B C = A B C + A B C + A B C + A B C + A B C + A B C We can now simplify this expression as B C + A C + A B A difficult method to use for complex expressions Added extra

48. Logical Expression Simplification (cont.) Simplify the next: WY + XY + WZ + XZ = (W + X) (Y + Z) Used rules WY + XY + WZ + XZ Distribution Y(W + X) + Z(W + X) (W + X) (Y + Z)

49. Logical Expression Simplification (cont.) Simplify the next: (X + Y) + (X + Y) = 0 Used Rules (X + Y) + (X + Y) Associative (X + X) + ( Y + Y) Complement, Idempotent 1 + YNull 1 0

50. Logical Expression Simplification (cont.) Simplify the next: (X + Y) + (X + Y) = 0 Used Rules (X + Y). (X + Y)De Morgan (X. Y). ( X. Y)De Morgan (X. Y). ( X. Y) Associative (X. X). (Y. Y) Idempotent (X. X). (Y) Complement 0. YNull 0

51. Simplification Using Boolean Algebra AB+A(B+C)+B(B+C)  (distributive law) AB+AB+AC+BB+BC  ( Idempotent ; BB=B) AB+AB+AC+B+BC  (I dempotent ; AB+AB=AB) AB+AC+B+BC  ( Absorption ; B+BC=B) AB+AC+B  ( Absorption ; AB+B=B) B+AC A B C A B C AB+A(B+C)+B(B+C)

52. Logical Expression Simplification (cont.) Two basic methods  Algebraic manipulation Use Boolean laws to simplify the expression Difficult to use Don’t know if you have the simplified form  Karnaugh map (K-map) method Graphical method Easy to use limited to problems with up to 4 binary inputs. Let's start with a simple example

53. Karnaugh Map Method Karnaugh Map Of Two Variables A = 0 B = 0 A = 0 B = 1 A = 1 B = 0 A = 1 B = 1

54. Karnaugh Map Method (cont.) Step 1: Find a truth tableStep 2: Draw a K-map FA’BA’B’B’A’BA 1011100 1100110 0001001 0000011 1 0 1 0 0 1 A B F = A’B’ + A’B

55. Karnaugh Map Method (cont.) Step 3: Group adjacent 1’s Step 4: Read off a reduced expression 1 0 1 0 0 1 A B 1 0 1 0 A B A’B’ A’B A’B’ + A’B = A’

56. Karnaugh Map Method (cont.) 1 0 1 0 0 1 A B 0 1 0 1 A B 1 1 0 0 A B 0 0 1 1 A B 1 1 1 0 A B 1 1 1 1 A B How to group adjacent 1’s ?