1. GEM R&D updates from Chinese groups Yuxiang Zhao University of Science and Technology of China May 24,2013 1

2. Five Chinese Groups China Institute of Atomic Energy (CIAE) Lanzhou University Tsinghua University University of Science and Technology of China (USTC) Institute of Modern physics 2

3. 3 Updates from Yi Zhou

4. 30cmx30cm GEM chamber assembling(NS2) Shielding board(top) GEM foil 4

5. Setup for the Lab test Read out board, pad readout for Lab test Top of the chamber, holes for radioactive source Test platform 5

6. To do list Noise issue(High voltage divider???) Lab test – Uniformity test – Gain – Charging effect, etc Italian electronics 6

7. 7 Updates from Xiaomei Li

8. Photolithography Lab Construction At CIAE Key step for GEM foil production: Lamination and exposure of dry film photoresist Lab construction at CIAE after CERN training session  Hot Roll Lamination(HRL) machine  Exposure system  Room equipped with yellow light source 1 2 3 8

9. Exposure of Dry Film Photoresist Doing test for Lamination and exposure of dry film photoresist  Collaborated with PCB factory  Accuracy needs to be improved 9

10. Recent Funds CIAE group have got three funds recently:  Two from CIAE for Lab Construction and Detector Development  Fund from State Key Laboratory of Particle Detection and Electronics for the R&D of Large Area GEM foil 10

11. 11 Updates from Zhigang Xiao

12. Last Update of GEM at Tsinghua University Hardware Preparation: 1 45x45 cm2 GEM foils arrived in Feb and shipped to DetLab at IMP. 2Assembling techniques: To use glue method 3To use strip readout for the large area prototype. 4 First Large area ( 45*45 cm2 ) prototype is expected in the next two months, (not sure whether can be ready by Huangshan workshop) 5 Test ASIC based FEE and VME DAQs. 1) 64 channels of APV FEE (developed in Tsinghua University) delivered; 2) Noise performance is not promising, we spent a lot of time and energy to reduce the noise level to a usable status (All test are OK without connecting to detector). Grounding to be improved. 3) VME-DAQ with multi peak-ADC modules development done and tested recently.