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Penn ESE534 Spring2012 -- DeHon 1 ESE534 Computer Organization Day 19: March 28, 2012 Minimizing Energy
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Penn ESE534 Spring2012 -- DeHon 2 Today Discuss broad set of architectural options to reduce energy Relevant to upcoming project
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Penn ESE534 Spring2012 -- DeHon 3 At Issue Many now argue energy will be the ultimate scaling limit –(not lithography, costs, …) Proliferation of portable and handheld devices –…battery size and life biggest issues Cooling, energy costs may dominate cost of electronics –Even server room applications
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Microprocessor Power Density Penn ESE534 Spring2012 -- DeHon 4 The Future of Computing Performance: Game Over or Next Level? National Academy Press, 2011 http://www.nap.edu/catalog.php?record_id=12980 Watts
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Penn ESE534 Spring2012 -- DeHon Source: Carter/Intel 5 Power Limits Integration Impact
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Watch Energy optimized along with area, delay Energy optimized with little or no effect on area/delay Energy trades off with area, delay Penn ESE534 Spring2012 -- DeHon 6
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7 Energy
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Penn ESE534 Spring2012 -- DeHon 8 Energy How scale down V?
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Penn ESE534 Spring2012 -- DeHon 9 Energy and Delay gd =Q/I=(CV)/I I d,sat =( C OX /2)(W/L)(V gs -V TH ) 2
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Penn ESE534 Spring2012 -- DeHon 10 Energy/Delay Tradeoff E V 2 gd 1/V We can trade speed for energy E×( gd ) 2 constant Martin et al. Power-Aware Computing, Kluwer 2001 http://caltechcstr.library.caltech.edu/308/ gd =(CV)/I I d,sat (V gs -V TH ) 2
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Penn ESE534 Spring2012 -- DeHon 11 Area/Time Tradeoff Also have Area-Time tradeoffs –HW2 spatial vs temporal multipliers –See more next week Compensate slowdown with additional parallelism …trade Area for Energy Architectural Option –HW3.3
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Reduce V Lower voltage and run in parallel –HW3.3 Lower voltage when you can get away with it (as much as can get away with) –Dynamic Voltage Scaling Lower voltage where don’t need it –Multiple Vdd Penn ESE534 Spring2012 -- DeHon 12
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Penn ESE534 Spring2012 -- DeHon 13 Energy How reduce C?
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Reduce C Shallow memory banks Reduce overhead programmable –Switches/stubs Reduce wire lengths –Maybe from reducing area Size gates Exploit technology Specialize computation or compute element Penn ESE534 Spring2012 -- DeHon 14
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Penn ESE534 Spring2012 -- DeHon 15 Energy How reduce a?
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Reduce a Avoid/reduce glitches Code data –Example FSM –Example data encoding –Example bus-invert –One hot Compress data (send less) Exploit correlations Power Gate unused regions Penn ESE534 Spring2012 -- DeHon 16
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Penn ESE534 Spring2012 -- DeHon 17 Energy How reduce CV 2 ?
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Reduce CV coupling Low swing highly capacitive signals –Bit-lines –Interconnect? Penn ESE534 Spring2012 -- DeHon 18
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Penn ESE534 Spring2012 -- DeHon 19 Energy How reduce aC?
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Reduce aC Put high a with low C Coding/compression at high C points Penn ESE534 Spring2012 -- DeHon 20
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Total Energy E total = E switch +E leak Penn ESE534 Spring2012 -- DeHon 21
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Total Energy E total = E switch +E leak Penn ESE534 Spring2012 -- DeHon 22 What if a i is small? T cycle large?
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Graph for In Class (Day 6) Penn ESE534 Spring2012 -- Mehta & DeHon 23
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Leakage Penn ESE534 Spring2012 -- DeHon 24 How reduce T cycle ?
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Reduce T cycle Run as fast as can Optimize for delay Pipeline Penn ESE534 Spring2012 -- DeHon 25
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Leakage Penn ESE534 Spring2012 -- DeHon 26 How reduce V?
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Reduce V? Power gate power down when not in use Penn ESE534 Spring2012 -- DeHon 27
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Leakage Penn ESE534 Spring2012 -- DeHon 28 How reduce I leak ?
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Reduce Leakage Current Power gating Increase V th Penn ESE534 Spring2012 -- DeHon 29
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Admin HW9 – note parts to run on computer –Don’t wait until Sunday to run them Reading for Monday on web Penn ESE534 Spring2012 -- DeHon 30
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Penn ESE534 Spring2012 -- DeHon 31 Big Ideas Power major limiter going forward –Can put more transistors on a chip than can switch Some optimizations good for energy as well as (area, delay) Some optimizations just for energy –No effect on area, delay Changes tradeoffs will make
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