1. Lecture 6: Branching CS 2011 Fall 2014, Dr. Rozier

2. LOGISTICS

3. Logistics 9/18 – Today 9/23 – Human Processor 9/25 – Exam Review 9/30 – Midterm I

4. LADIES AND TIGERS

5. The Lady and the Tiger Doors containing either Ladies or Tigers

6. The Lady and the Tiger Once again, you’ll have to tell Ladies from Tigers A new twist is being added. – Two doors – If a lady is in Room I, then the sign on the door is true. If a tiger is in Room I, then the sign on the door is false. – The opposite is true for Room II.

7. The Lady and the Tiger Q1 Room ?? This room contains a tiger. Both rooms contain tigers Room ??

8. The Lady and the Tiger Q1 Room II Room I

9. The Lady and the Tiger Once again, you’ll have to tell Ladies from Tigers A new twist is being added. – Three doors! – One lady, TWO tigers – At most one of the signs is true

10. The Lady and the Tiger Q2 Room I A tiger is in this room. Room II A lady is in this room. A tiger is in room II. Room III

11. The Lady and the Tiger Q2 Room I Room II Room III

12. The Lady and the Tiger Once again, you’ll have to tell Ladies from Tigers A new twist is being added. – Three doors! – One lady, TWO tigers – The sign on the door of the room with the lady is true. At least one of the other two signs is false!

13. The Lady and the Tiger Q3 Room I A tiger is in room II. Room II A tiger is in this room. A tiger is in room I. Room III

14. The Lady and the Tiger Q3 Room I Room II Room III

15. BRANCHING

16. Branching Conditional execution isn’t the only tool in our belt.

17. Branching Branches allow us to transfer control of the program to a new address. – b ( ) – bl ( ) b start bl start

18. Branching Basic branches do not operate on registers. Typically we branch to an indicated LABEL, example: MAIN: b END END: b MAIN

19. Branching Branches are calculated by the assembler relative to the current address. – Allows branching +/- 32 Mbytes Branch stores the target address in the Program Counter Branch and link also stores the next address in the link register.

20. Branch (b) Branch, possibly conditionally, to a new address. beq subroutine @ If Z=1, branch Good practice to use bal instead of b.

21. Branch with link (bl) Branch, possibly conditionally, to a new address. – Before the branch is complete, store the PC in the LR. – Allows easy return from the branch. bleq subroutine @ If Z=1, branch, saving the PC

22. A note on programs and memory What is a program?

23. Registers Each register holds a word (4 bytes). Registers r0-r12 are general purpose. NameFunctionNameFunction r0General Purposer8General Purpose r1General Purposer9General Purpose r2General Purposer10General Purpose r3General Purposer11General Purpose r4General Purposer12General Purpose r5General Purposer13Stack Pointer r6General Purposer14Link Register r7General Purposer15Program Counter

24. The Memory Hierarchy

25. CPU + Control

26. Pipeline Fetch Decode Issue Integer Multiply Floating Point Load Store Write Back

27. Branch with link (bl) How do we get back once we’ve saved the PC? mov pc, lr Moves the contents of the link register to the program counter.

28. Implementing If Statements C code: if (i == j) f = g+h; else f = g - h; ARM code cmp r0, r1 @ Set flags via r0-r1 and discard beq Else add r2, r3, r4 @ r2 = r3 + r4 bal Exit Else: sub r2, r3, r4 @ r2 = r3 + r4 Exit:

29. Implementing Loop Statements C code: while (i < j) i += 1; ARM code Loop: cmp r0, r1 bge Exit add r0, r0, #1 bal Loop Exit: i < j? i=i+1 i<j Exit i>=j

30. Basic Blocks A basic block is a sequence of instructions with – No embedded branches (except at end) – No branch targets (except at beginning) A compiler identifies basic blocks for optimization An advanced processor can accelerate execution of basic blocks

31. ADVANCED CONTROL

32. What about a Case Statement? Say we have a case statement: switch(x) { case 0: foo(); break; case 1: bar(); break; case 2: baz(); break; case 3: qux(); break; }

33. Jump Tables Set up a portion of memory as such: If our case variable is stored in r0… – r0 << #2 is the index into our jump table of the function address. Memory LocationContents 0x???? + 0address of foo 0x???? + 4address of bar 0x???? + 8address of baz 0x???? + 12address of qux

34. Cases Statements as Jump Tables (assume r0 holds the switch variable) ldr r1, =jumptable ldr pc, [r1, r0, lsl #2] Wasn’t that easy?

35. Pseudo-Instructions Notice the use of: – ldr r0, =jumptable What is really going on here?

36. Hello World string:.asciiz "Hello World!\n"; ldrr1,=string swi0 movr7,#1 swi0

37. Pseudo-Instructions Code as we wrote it: Disasembled code: ldrr1,=string swi0 movr7,#1 swi0 0x8080ldrr1,[pc,#8] 0x8084svc0x0 0x8088movr7#1 0x808csvc0x0 0x8090muleqr1r4r0

38. This is weird… Let’s play with gdb… x/x 0x8090 0x8090 :0x00010094 x/x 0x10094 0x10094 :“Hello World!\nA\025”

39. So why does it show up as muleq? Representing instructions – Condition Field 0000 – EQ – 0000 | 000000 | 0 | 0 |????|????|????| 1001|???? mul r1, r4, r0 mul{ }{S} rd, rm, rs Cond000000ASRdRnRs1001Rm Instruc000000000000???? 1001???? Hex00010094 Bin0000 00010000 10010100

40. So why does it show up as muleq? Representing instructions mul r1, r4, r0 mul{ }{S} rd, rm, rs mul 0001, 0100, 0000 Cond000000ASRdRnRs1001Rm Instruc000000000000???? 1001???? Hex00010094 Bin0000 00010000 10010100

42. So what is this? Code as we wrote it: Disasembled code: ldrr1,=string swi0 movr7,#1 swi0 0x8080ldrr1,[pc,#8] 0x8084svc0x0 0x8088movr7#1 0x808csvc0x0 0x8090muleqr1r4r0

43. The problem with immediates The fact that instructions, AND all their arguments, must take up only 32 bits limits the size of immediates to 1 byte. – Range 0 – 255. – Hello world was in 0x10094 – PC was at 0x8088 – Max offset with immediate value? 0x8088 + 0xFF = 0x8187

44. Enter, the Literal Pool 0x8080ldrr1,[pc,#8] 0x8084svc0x0 0x8088movr7#1 0x808csvc0x0 0x809000010094 Last instruction in basic block Literal Pool

45. Basic Blocks A basic block is a sequence of instructions with – No embedded branches (except at end) – No branch targets (except at beginning) A compiler identifies basic blocks for optimization An advanced processor can accelerate execution of basic blocks

46. For next time The Human Processor