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CHARLES UNIVERSITY IN PRAGUE faculty of mathematics and physics Principles of Computers 11 th Lecture Pavel Ježek, Ph.D.

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Presentation on theme: "CHARLES UNIVERSITY IN PRAGUE faculty of mathematics and physics Principles of Computers 11 th Lecture Pavel Ježek, Ph.D."— Presentation transcript:

1 CHARLES UNIVERSITY IN PRAGUE http://d3s.mff.cuni.cz/~jezek faculty of mathematics and physics Principles of Computers 11 th Lecture Pavel Ježek, Ph.D. pavel.jezek@d3s.mff.cuni.cz

2 CPU arch. CPU nameData widthLogical address width Current instruction register(s) Physical address width Special mode 8-bit 6502 MOS 65028-bit data16-bitPC16-bit (64 kB) Examples of CPU Architectures

3 CPU arch. CPU nameData widthLogical address width Current instruction register(s) Physical address width Special mode 8-bit 6502 MOS 65028-bit data16-bitPC16-bit (64 kB) 16-bit x86-16 x86 Intel 80888-bit data16 + 16 bitCS:IP20-bit (1 MB) Intel 808616-bit data Examples of CPU Architectures

4 CPU arch. CPU nameData widthLogical address width Current instruction register(s) Physical address width Special mode 8-bit 6502 MOS 65028-bit data16-bitPC16-bit (64 kB) 16-bit x86-16 x86 Intel 80888-bit data16 + 16 bitCS:IP20-bit (1 MB) Intel 808616-bit data Intel 8028616-bit data16 + 16 bitCS:IP24-bit (16 MB) protected 16 (+ real) mode Examples of CPU Architectures

5 CPU arch. CPU nameData widthLogical address width Current instruction register(s) Physical address width Special mode 8-bit 6502 MOS 65028-bit data16-bitPC16-bit (64 kB) 16-bit x86-16 x86 Intel 80888-bit data16 + 16 bitCS:IP20-bit (1 MB) Intel 808616-bit data Intel 8028616-bit data16 + 16 bitCS:IP24-bit (16 MB) protected 16 (+ real) mode 32-bit x86 IA-32 INTEL32 Intel 8038632-bit data32-bitEIP32-bit (4 GB) protected 32 mode Examples of CPU Architectures

6 CPU arch. CPU nameData widthLogical address width Current instruction register(s) Physical address width Special mode 8-bit 6502 MOS 65028-bit data16-bitPC16-bit (64 kB) 16-bit x86-16 x86 Intel 80888-bit data16 + 16 bitCS:IP20-bit (1 MB) Intel 808616-bit data Intel 8028616-bit data16 + 16 bitCS:IP24-bit (16 MB) protected 16 (+ real) mode 32-bit x86 IA-32 INTEL32 Intel 8038632-bit data32-bitEIP32-bit (4 GB) protected 32 mode Intel Pentium Pro64-bit data32-bitEIP36-bit (64 GB) PAE Examples of CPU Architectures

7 CPU arch. CPU nameData widthLogical address width Current instruction register(s) Physical address width Special mode 8-bit 6502 MOS 65028-bit data16-bitPC16-bit (64 kB) 16-bit x86-16 x86 Intel 80888-bit data16 + 16 bitCS:IP20-bit (1 MB) Intel 808616-bit data Intel 8028616-bit data16 + 16 bitCS:IP24-bit (16 MB) protected 16 (+ real) mode 32-bit x86 IA-32 INTEL32 Intel 8038632-bit data32-bitEIP32-bit (4 GB) protected 32 mode Intel Pentium Pro64-bit data32-bitEIP36-bit (64 GB) PAE 64-bit x64 x86-64 AMD64 INTEL64 EM64T AMD Opteron (Intel Pentium 4) 64-bit data64-bitRIP40-bit (1 TB) long mode Examples of CPU Architectures

8 CPU arch. CPU nameData widthLogical address width Current instruction register(s) Physical address width Special mode 8-bit 6502 MOS 65028-bit data16-bitPC16-bit (64 kB) 16-bit x86-16 x86 Intel 80888-bit data16 + 16 bitCS:IP20-bit (1 MB) Intel 808616-bit data Intel 8028616-bit data16 + 16 bitCS:IP24-bit (16 MB) protected 16 (+ real) mode 32-bit x86 IA-32 INTEL32 Intel 8038632-bit data32-bitEIP32-bit (4 GB) protected 32 mode Intel Pentium Pro64-bit data32-bitEIP36-bit (64 GB) PAE 64-bit x64 x86-64 AMD64 INTEL64 EM64T AMD Opteron (Intel Pentium 4) 64-bit data64-bitRIP40-bit (1 TB) long mode 2015 current (e.g. Core i7) 64-bit data64-bitRIPAMD: 48b → 256 TB Intel: 46b → 64 TB Examples of CPU Architectures

9 CPU arch. CPU nameData widthLogical address width Current instruction register(s) Physical address width Special mode 8-bit 6502 MOS 65028-bit data16-bitPC16-bit (64 kB) 16-bit x86-16 x86 Intel 80888-bit data16 + 16 bitCS:IP20-bit (1 MB) Intel 808616-bit data Intel 8028616-bit data16 + 16 bitCS:IP24-bit (16 MB) protected 16 (+ real) mode 32-bit x86 IA-32 INTEL32 Intel 8038632-bit data32-bitEIP32-bit (4 GB) protected 32 mode Intel Pentium Pro64-bit data32-bitEIP36-bit (64 GB) PAE 64-bit x64 x86-64 AMD64 INTEL64 EM64T AMD Opteron (Intel Pentium 4) 64-bit data64-bitRIP40-bit (1 TB) long mode 2015 current (e.g. Core i7) 64-bit data64-bitRIPAMD: 48b → 256 TB Intel: 46b → 64 TB Examples of CPU Architectures 32-bit ARM64-bit ARM32b MIPSMIPS64PowerPC (PPC)32b Motorola 68000 (68k)

10 program PascalProgram; type PProc = procedure; procedure P1; begin α end; procedure P2; begin β end; var i : word; ptr : PProc; j : word; begin γ 1 ptr := @P1; ptr; P2; γ 2 end.

11 program PascalProgram; type PProc = procedure; procedure P1; begin α end; jmp back procedure P2; begin β end; jmp back var i : word; ptr : PProc; j : word; begin γ 1 ptr := @P1; ptr; indirect jump P2; direct jump γ 2 end. A B C1 C2

12 ... $00007A00 B... $00002100 A... $00002000 C2 ?? JMPE9$00001306 ?? JMP indir 25 FF$00001300 C1... $00001000... procedure P2 procedure P1 main program program PascalProgram; type PProc = procedure; procedure P1; begin α end; jmp back procedure P2; begin β end; jmp back var i : word; ptr : PProc; j : word; begin γ 1 ptr := @P1; ptr; P2; γ 2 end. A B C1 C2

13 ... 00 $00007A08 00 (00) 00 (20) 00 (00)$00007A04 00 $00007A02 00 $00007A00 B... $00002100 A... $00002000 C2 ?? JMPE9$00001306 ?? JMP indir 25 FF$00001300 C1... $00001000... variable j variable ptr padding variable i procedure P2 procedure P1 main program program PascalProgram; type PProc = procedure; procedure P1; begin α end; jmp back procedure P2; begin β end; jmp back var i : word; ptr : PProc; j : word; begin γ 1 ptr := @P1; ptr; P2; γ 2 end. A B C1 C2

14 ... 00 $00007A08 00 (00) 00 (20) 00 (00)$00007A04 00 $00007A02 00 $00007A00 B... $00002100 A... $00002000 C2 00 21 00 JMPE9$00001306 00 7A 04 JMP indir 25 FF$00001300 C1... $00001000... variable j variable ptr padding variable i procedure P2 procedure P1 main program program PascalProgram; type PProc = procedure; procedure P1; begin α end; jmp back procedure P2; begin β end; jmp back var i : word; ptr : PProc; j : word; begin γ 1 ptr := @P1; ptr; P2; γ 2 end. A B C1 C2 $00002100 $00007A04

15 ... 00 $00007A08 00 (00) 00 (20) 00 (00)$00007A04 00 $00007A02 00 $00007A00 B... $00002100 A... $00002000 C2 00 21 00 JMPE9$00001306 00 7A 04 JMP indir 25 FF$00001300 C1... $00001000... variable j variable ptr padding variable i procedure P2 procedure P1 main program program PascalProgram; type PProc = procedure; procedure P1; begin α end; jmp back procedure P2; begin β end; jmp back var i : word; ptr : PProc; j : word; begin γ 1 ptr := @P1; ptr; P2; γ 2 end. A B C1 C2 $00002100 ← $00002100 – ($001306 + 5) E9 = relative jump $00007A04

16 ... 00 $00007A08 00 (00) 00 (20) 00 (00)$00007A04 00 $00007A02 00 $00007A00 B... $00002100 A... $00002000 C2 00 0D F5 JMPE9$00001306 00 7A 04 JMP indir 25 FF$00001300 C1... $00001000... variable j variable ptr padding variable i procedure P2 procedure P1 main program program PascalProgram; type PProc = procedure; procedure P1; begin α end; jmp back procedure P2; begin β end; jmp back var i : word; ptr : PProc; j : word; begin γ 1 ptr := @P1; ptr; P2; γ 2 end. A B C1 C2 $00002100 ← $00002100 – ($001306 + 5) = $00002100 – $0000130B = $00000DF5 E9 = relative jump $00007A04

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