1. BCC-35 A.K. Bhattacharyya, A. Butterworth, F. Dubouchet, J. Molendijk, T. Mastoridis, J. Noirjean(reporter), S. Rey, D. Stellfeld, D. Valuch, P.Baudrenghien J.Noirjean /12.05.20111

2.  LLRF Cavity controller  Servo loops  Reference line  Clocks Distributor module  Tuner Loop module  Cavity Loop module  Switch and Limit module J.Noirjean /12.05.20112

3. 3 Each Klystron driving one or more cavities has its own electronic system (one VME crate) in phase with its RF signal reference

4. J.Noirjean /12.05.20114 Tuner Loop keeps the structure on resonance

5. J.Noirjean /12.05.20115 RF Feedback and Feedforward keep the accelerating voltage at the desired value in the presence of beam transient

6. J.Noirjean /12.05.20116 Klystron Drive Limiter prevents driving the klystron over the saturation limit during loop transients

7. J.Noirjean /12.05.20117 Klystron Polar Loop compensates the variation gain across klystron/circulator and phase shift caused by High Voltage (HV) supply fluctuations and droop

8. J.Noirjean /12.05.20118 Designer D.Valuch Some coupler properties -Coupling ~30 dB -Output RF level ~20 dBm

9. J.Noirjean /12.05.20119 Concept J.Molendijk,Designer J.Noirjean/J.Lolleriou -Generates harmonically related clocks for the Digital Demodulators -We have different versions for different systems (SPS TWC800MHz, SPS TWC 200MHz, Linac4) LO Phase noise = 167 fs jitter(= 0.02 degree)

10. J.Noirjean /12.05.201110 Designer J.Noirjean Main electronics components: -Xilinx Virtex-5 -ADI SHARC DSP, 400 MHz -2 x 72 Mbit SRAM -4 x Dual ADI ADC, 125 MSPS, 14 bit -2 x SerDes transceivres, 1.5 GBps -Dual DAC, 125 MSPS, 14 bits -8 x RF Front-end channels, ENOB 11.04 bits

11. J.Noirjean /12.05.201111 Tuner Loop control acts on: -The tuner position -The phase shifter (communication over Ethernet)

12. J.Noirjean /12.05.201112 Tuner Loop control acts on: -The tuner position -The phase shifter (communication over Ethernet) Courtesy:N.Schwerg

13. J.Noirjean /12.05.201113 Designer G.Hagmann -Module being designed for SPS 800MHz -Will be adapted for Linac4: Low latency digital chips(ADC’s,and DAC’s) Redesigned analog filters

14. J.Noirjean /12.05.201114 Cavity loop acts on: -The RF drive to regulate the field in the cavities -The phaseshifter to balance the hybrid, compensating for its asymmetry

15. J.Noirjean /12.05.201115 Cavity loop acts on: -The RF drive to regulate the field in the cavities -The phaseshifter to balance the hybrid, compensating for its asymmetry Courtesy:N.Schwerg

16. J.Noirjean /12.05.201116 Desiger G.Hagmann -Prevents from driving the klystron in saturation -Entry point for the High power RF interlock -Adapted from SPS TWC 800MHz system for Linac4 purposes

17. Thank you for your attention J.Noirjean /12.05.201117