1. 1 CSE 140 Lecture 11 Standard Combinational Modules CK Cheng CSE Dept. UC San Diego

2. 2 Part III - Standard Combinational Modules (Harris: 2.8, 5) Signal Transport Decoder: Decode address Encoder: Encode address Multiplexer (Mux): Select data by address Demultiplexier (DeMux): Direct data by address Shifter: Shift bit location Data Operator Adder: Add two binary numbers Multiplier: Multiply two binary numbers

3. 3 Interconnect: Decoder, Encoder, Mux, DeMux Processors Decoder: Decode the address to assert the addressed device Mux: Select the inputs according to the index addressed by the control signals P1 Memory Bank Mux P2 Pk Demux Decoder Mux Data Address Address k Address 2 Address 1 Data 1 Data k Arbiter n n-m m 2m2m

4. 4 1. Decoder Definition Logic Diagram Application (Universal Set) Tree of Decoders

5. iClicker: Decoder Definition A.A device that decodes B.An electronic device that converts signals from one form to another C.A machine that converts a coded text into ordinary language D.A device or program that translates encoded data into its original format E.All of the above 5

6. 6 Decoder Definition: A digital module that converts a binary address to the assertion of the addressed device 0 y0y1y7y0y1y7 I0I0 I1I1 I2I2 1 2 0123456701234567 E (enable) n inputs n= 3 2 n outputs 2 3 = 8 y i = 1 if E= 1 & (I 2, I 1, I 0 ) = i y i = 0 otherwise n to 2 n decoder function:....

7. 7 N inputs, 2 N outputs One-hot outputs: only one output HIGH at most 1. Decoder: Definition E E= 1

8. 8 Decoder: Logic Diagram y0y0 I2’I2’ I1’I1’ I0’I0’ y1y1 I2I2 I1’I1’ I0’I0’ E y7y7 I2I2 I1I1 I0I0.... Output Expression: y i = E∙m i y 0 =1 if E=1 & (I 2, I 1, I 0 )=(0,0,0) y 7 =1 if E=1 & (I 2, I 1, I 0 )=(1,1,1)

9. 9 PI Q: What is the output Y 3:0 of the 2:4 decoder for (A 1, A 0 ) = (1,0)? A.(1, 1, 0, 0 ) B.(1, 0, 1, 1) C.(0, 0, 1, 0) D.(0, 1, 0, 0) 1. Decoder: Definition

10. 10 Decoder Application: universal set {Decoder, OR} Example: Implement the following functions with a 3-input decoder and OR gates. i) f 1 (a,b,c) = Σm(1,2,4) ii) f 2 (a,b,c) = Σm(2,3), iii) f 3 (a,b,c) = Σm(0,5,6)

11. 11 Decoder Application: universal set {Decoder, OR} Decoder produces minterms when E=1. We can use an OR gate to collect the minterms to cover the On-set. For the Don’t Care-Set, we can just ignore the terms.

12. 12 Decoder Application: universal set {Decoder, OR} Example: Implement functions i)f 1 (a,b,c) = Σm(1,2,4) + Σd(0,5), ii)f 2 (a,b,c) = Σm(2,3) + Σd(1,4), iii)f 3 (a,b,c) = Σm(0,5,6) with a 3-input decoder and OR gates. I0I0 y0y1..y7y0y1..y7 c b a I1I1 I2I2 0123456701234567 E=1 y1y1 y2y2 y4y4 f1f1 y2y2 y3y3 f2f2 y0y0 y6y6 f3f3 y5y5

13. 13 OR minterms Decoders E=1

14. 14 Tree of Decoders: Scale up the size of the decoders using a tree structure Implement a 4-2 4 decoder with 3-2 3 decoders. I0I0 y0y1y7y0y1y7 I1I1 I2I2 0123456701234567 I0I0 y 8 y 9 y 15 I1I1 I2I2 0123456701234567 a d c b

15. 15 Implement a 6-2 6 decoder with 3-2 3 decoders. E D0D0 I 2, I 1, I 0 D1D1 y0y0 y7y7 y8y8 y 15 D7D7 y 56 y 63 E I 2, I 1, I 0 I 5, I 4, I 3 Tree of Decoders … …

16. PI Q: A four variable switching function f(a,b,c,d) can be implemented using which of the following? A.1:2 decoders and OR gates B.2:4 decoders and OR gates C.3:8 decoders and OR gates D.All of the above E.None of the above 16

17. 17 2. Encoder Definition Logic Diagram Priority Encoder

18. iClicker: Definition of Encoder A.Any program, circuit or algorithm which encodes B.In digital audio technology, an encoder is a program that converts an audio WAV file into an MP3 file C.A device that convert a message from plain text into code D.A circuit that is used to convert between digital video and analog video E.All of the above 18

19. 19 Encoder Definition: A digital module that converts the assertion of a device to the binary address of the device. y n-1 … y 0 E A I 2 n -1 … I 0 8 inputs 3 outputs y0y0 y1y1 y2y2 0123456701234567 E At most one I i = 1. (y n-1,.., y 0 ) = i if I i = 1 &  = 1 (y n-1,.., y 0 ) = 0 otherwise. A = 1 if E = 1 and one i s.t. I i = 1 A = 0 otherwise. Encoder Description: A I0I0 I7I7 012012

20. 20 Encoder: Logic Diagram En I1I1 I3I3 I5I5 I7I7 y0y0 I2I2 I3I3 I6I6 I7I7 y1y1 I4I5I6I7I4I5I6I7 y2y2 I0I0 I1I1 I6I6 I7I7 A..

21. 21 Priority Encoder: 01230123 E EoGs I0I0 I3I3 y0y0 y1y1 0101

22. 22 Priority Encoder: Definition Description: Input (I 2 n -1,…, I 0 ), Output (y n-1,…,, y 0 ) (y n-1,…,, y 0 ) = i if I i = 1 & E = 1 & I k = 0 for all k > i (high bit priority) or for all k< i (low bit priority). E o = 1 if E = 1 & I i = 0 for all i, G s = 1 if E = 1 & i s.t. I i = 1. E (G s is like A, and E o passes on enable). 0123456701234567 E EoGs I0I0 I7I7 y0y0 y1y1 y2y2 012012

23. 23 Priority Encoder: Implement a 32-input priority encoder w/ 8 input priority encoders (high bit priority). y 32, y 31, y 30 I 31-24 Eo Gs y 22, y 21, y 20 I 25-16 Eo Gs y 12, y 11, y 10 I 15-8 Eo Gs y 02, y 01, y 00 I 7-0 Eo Gs E