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1 Summary of Calorimeter LED monitoring, LV & MV power and HV electronics + ECS control 2.06.10 Anatoli Konoplyannikov Outline  Software tool of the LED.

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Presentation on theme: "1 Summary of Calorimeter LED monitoring, LV & MV power and HV electronics + ECS control 2.06.10 Anatoli Konoplyannikov Outline  Software tool of the LED."— Presentation transcript:

1 1 Summary of Calorimeter LED monitoring, LV & MV power and HV electronics + ECS control 2.06.10 Anatoli Konoplyannikov Outline  Software tool of the LED timing scan and data analysis  Answer on frequent questions. How-To for LV&MV, LEDTSB control  Documentation reference on CALO TWiki  Backups  the CALO HV status ECS panel summarizes operation of the devices mentioned below  the calorimeters LV & MV power supplies and ECS control  the ECAL/HCAL HV power supply system and ECS control  the PS/SPD HV power supply system and ECS control  the XCAL LED monitoring system (LEDTSB)  the CALO HV Status Bit generation electronics and ECS control  HCAL CS calibration and PMT integrated current readout electronics  HCAL CW bases and LED drivers electronics taken care by IHEP group  ECAL PMT current readout - ECS monitoring panel

2 2 Software tool for doing XCAL LED timing scan and data analysis Procedure: 2.06.10 Anatoli Konoplyannikov I. Collect LED timing scan data from sub-detector top level panel. For doing this one has to do: a)select activity “PHYSICS|TimeScan”; b)configure XCAL DAQ partition with DEFAULT recipe; c)set number of steps to 26 and events per step 800, TAE = +- 2. II. Using standard CALO scripts create the root file with the name RunNumber.root (description on Olivier’s TWiki pages), then create a new directory xcRunNumber on disk S:\everyone\akonDATA and put the root file into this directory (where x is e or h). III. All analysis codes are on S:\everyone\akonDATA\anaLED10\xcal. There are two type of the root codes one is xc_fstTAE5.c for first step of the analysis. In this time a detailed file with the histogram parameters on each detector cell for five TAE is created per each step. For visualization the signal curves and creating the LEDTSB recipe file, the xcA_secana_t0Show.c or xcC_secana_t0Show.c code is used (individual code per side of the sub-detector). Analysis steps: 1.edit root code file for defining correct Run Number (two lines); 2.launch ROOT on lynux online PC and execute code: root.x xc_fstTAE5.c 3.then execute code: root.x xcX_secana_t0Show.c 4.The output JPEG files with signal curves and text RECIPE file will be created.

3 3 Procedure of XCAL LED timing scan and data analysis 2.06.10 Anatoli Konoplyannikov a) b) Configure with DEFAULT recipe c) Screen short of the ECAL top panel with parameters needed for LED time scan

4 4 Results of the XCAL LED timing scan and data analysis CALO meeting 2. 06. 2010 Anatoli Konoplyannikov [ITEP] The signal curves for all FE and PIN channels are produced as analysis output. As example a faulty channel diagnostic with ECAL LED system is shown below: Typical shapes with one faulty operated channel. PIN diodes signal shapes as seen by dedicated FE board.

5 5 CALO meeting 2. 06.2010 Anatoli Konoplyannikov [ITEP] Timing summary for ECAL A side Good PMT’s timing with RMS = 1.4 ns but about 7 channels are malfunctioning Results of the XCAL LED timing scan and data analysis (continued)

6 6 Answer on typical questions How To: CALO LEDTSB tuning and ECS control 2.06.10 Anatoli Konoplyannikov Q. What to do in case if LED signal appears in Prev1 time slot in ~80% of cases; in 20% of cases it is in T0, there is also some small amount of hits in Next1 time slot? A. 1. as you know, LEDTSB is implemented on Delay Chip developed at LAL. Due to this reason it has the same behavior as for FE boards (see Frederic’s presentations). It has some unstable region of delay settings (1 - 2 ns) for each of 25 ns interval. For solving un-stability problem one has to change the delay settings for these channels by one ns, collect data and see what is changed. For doing this: 2. launch the ECDAQX1 DEN, open by “view” the LEDTSB devices, select needed board / channel and change a delay value in "Delay" column. Afterwards push "Apply" button, collect data and check the event numbers in prev, T0 and next samples. 3. if a new settings is OK, update the DEFAULT recipe from top level LEDTSB panel.

7 7 How To: CALO HV power supply and ECS control 2.06.10 Anatoli Konoplyannikov Q. What to do in case the problems with the HV system restarting? A.As was written in CALO HV tutorial, after rebooting PC and restarting a HV project, in case of the problem, one has to do: 1. go through the main First Time initialization panel (one per each side of sub-detector) and perform Specs_Init and Set_HV_OFF actions (wait while operation is finished) and then close the panel. 2. check the logout of a HV project (the panel could be opened from Project Administrator panel). In case of normal running one can see the HVmonitoring script messages. If there is no any messages, one must restart the HVmonitoring script.

8 8 How To: CALO LV - MV power supplies and ECS control 2.06.10 Anatoli Konoplyannikov Q. What to do in case if the MV power supply is in an unexpected OFF state? A. 1. one has to take a corresponded HV project and set HV off for both sides 2. using the Service+ restart CADCSMV project (stop -> start); 3. from DCS partition set corresponded MV voltages ON; 4. using HV projects set needed HV and release HV projects. Q. How initialize the Agilent power supply after a current overload? A.1. Set all HV OFF for problematic sub-detector using HV projects; 2. Using DEN of the CADDCSMV project go to hardware and open problematic power supply; 3. Push “Power On” for reinitializing Agilent PS. After this all voltages will be at zero. 2 3

9 9 2.06.10 Anatoli Konoplyannikov Documentation references on LHCb CALO TWiki pages Many documentation and tutorials of the CALO HV – LED systems are placed on the CALO TWiki pages: https://lbtwiki.cern.ch/bin/view/CALO/CaloPiquetHighVoltage Hardware description and circuit diagrams (unfortunately mainly as papers) given to Michail, Pavel and Yuri; All spares boards and Agilent PS are stored in bld. 13 – 1/001; I’ll stay at CERN and will be available for any questions; Thank you !

10 10 2.06.10 Anatoli Konoplyannikov In red the board usage & Spares: are shown !

11 11 CALO Piquet Training Session 17.11.09 Anatoli Konoplyannikov /ITEP/ For monitoring MV currents: Push Start -> I_reference from “Current MV” line will be copied and monitoring started; In case, if current is more or less of the I_reference on 10 mA the colour will be changed to yellow. LED monitoring info for showing LEDTSB and LED intensity boards status. If green the triggering is enabled, red if not. Screenshot of the top level CALO HV Status panel Global CALO HV Status

12 12 LV power supply and ECS control There are three PVSS projects to manage the LV and MV of the CALO sub-detectors.  Rack Control is the DAI partition project (common for LHCb experiment) for FE crates Power Supply control.  CADCSLV is the DCS partition project for the Wiener LV power supplies dedicated for powering the CALO sub-detectors HV, VFE and LED intensity systems.  CADCSMV is the DCS partition project for the Agilent MV (30 – 150 V) power supplies dedicated for CALO sub-detectors HV system. The shortcuts of these projects: CADCSLV_UI_DEN CADCSMV_UI_FSM INFDAI_UI_DEN are located in folder g:/calo/pvss. Back view of the ECAL/PRS Wiener LV power supply dedicated for HV and LED intensity control 4 Wiener frames (without VFE LV) in use & Spares: 1 Wiener LV power crate (6 channels). 30.04.10 Anatoli Konoplyannikov

13 13 MV power supply and ECS control 5 Agilent PS's are used for producing middle voltages for calorimeter sub-detectors. a) ECAL four units PS (100V, 30V,100V, 30V for A and C sides); b) HCAL four units PS (100V, 30V,100V, 30V for A and C sides); c) PS/SPD one unit PS (150V for side A); d) PS/SPD one unit PS (150V for side C); e) CALO four units PS with one + 5 V unit 5 Agilent frames in use & Spares: 1 power mainframes N6701A; 1 100 V N6776 power unit; 2 30 V N6734B power units. 30.04.10 Anatoli Konoplyannikov

14 14 Status of the calorimeter Agilent power supplies ECS control The PVSS software for control and monitor these devices was developed. The soft is installed on the CADCSC01W PC and the project name is CADCSMV. Agilent DIM server was written and five Agilent DIM servers are running on this PC. Control PVSS software is based on JCOB fwWiener and LHCb online group lbLV components. Each power supply has one LAN connection to ECS. The shortcut of the project is located in folder g:/calo/pvss. Thanks a lot to Clara for guidance and help! 2.06.10 Anatoli Konoplyannikov

15 15  All ECAL/HCAL HV_LED_DAC boards were installed on the sub-detectors Status of the ECAL/HCAL HV system and ECS control HCAL on detector patch panel with two HV_LED_DAC boards for HV & LED systems control 42 HV_LED_DAC boards in use & Spares: 5 HV_LED_DAC control boards ( 3 without mezzanines). 40 boards were equipped with SPECS mezzanines, passed final QC and delivered to ECAL (32 for HV + 2 for integrator readout) and HCAL(8) sub-detectors Firmware Firmware Version_7 for Actel APA-075 supports an automated voltage ramp up and a fast DAC’s monitoring. 2.06.10 Anatoli Konoplyannikov

16 16 The production version of the HV and LED intensity control ECS software is used now. The version features are:  Integrated into FSM tree with load data from recipes.  There are three possibility to update the recipe: from file, from CALO DB and from expert panels.  Improved an expert panel graphics. Status of the ECAL/HCAL HV ECS control Screen short of the updated HV control panels. 30.04.10 Anatoli Konoplyannikov

17 17 Status of the PS/SPD HV power supply and ECS control  The PS/SPD HV system has been produced and delivered at CERN.  100 % of the electronics were tested, passed the QC and installed into the racks.  The production ECS software is developed and used. Firmware Current firmware is Version_1 for Actel APA-300. PS/SPD HV crate. 22 HV_converter and 2 control boards in use & Spares: 3 HV converter boards; 1 HV_LED control board (without Specs mezzanine); 30.04.10 Anatoli Konoplyannikov

18 18 Status of the PS/SPD HV power supply and ECS control PVSS expert control panels for PS/SPD HV and LED intensity control 30.04.10 Anatoli Konoplyannikov

19 19 Status of the LEDTSB boards and ECS control 15 LEDTSB boards have been produced and 12 boards installed into the FE crates. Firmware Firmware of the LEDTSB has been developed on FPGA Actel APA-300. The firmware of all LEDTSB boards has been updated to the latest version 8.0. 12 LEDTSB in use & Spares: 3 LEDTSB boards (2 without mezzanines). ECAL FE crate with two LEDTSB boards cabled to the detector 30.04.10 Anatoli Konoplyannikov

20 20 Calorimeters LED control LEDTSB board configuration and control panels. Status of the LEDTSB boards and ECS control A PVSS LEDTSB tutorial for manage the LED system during the commissioning runs has been prepared and reachable from LHCb TWiki page: https://twiki.cern.ch/twiki/bin/view/LHCb/LHCbCaloLED The PVSS software for LEDTSB boards has been developed. It is integrated in FSM tree of the DAQ partition and used in a global LHCb test. 30.04.10 Anatoli Konoplyannikov

21 21 HVSB board functionality:  Fast measurement MV power supply currents.  Produce the LVDS signals to the ODIN supervisor in case when the power current is out of range. Two decision bits are dedicated to each sub-detector (one bit per sub-detector side).  Board is equipped with DACs, comparators and logic CPLD.  The Specs mezzanine is used for DC levels measurement by DCU-ADC and communication with ECS. The CALO sub-detector HV Status Bit board has been developed, produced and tested. The solution is based on the MV power supply current measurement and sending the logical decision to ODIN supervisor for producing the data quality bits. Connectors to MV power supplies RJ45 connectors to ODIN supervisor Final photo of the HVSB board. CALO HV Status bits for ODIN ( hardware) 1 HVSB board in use & Spares: 1 HVSB board without Specs mezzanines. 30.04.10 Anatoli Konoplyannikov

22 22 Firmware  The MAX-II ALTERA logic CPLD EPM240 has been chosen for implementation of logic function for producing a decision to ODIN supervisor.  Logic implemented inside CPLD allows to mask any input channels, make needed coincidence and produce a decision output signal for each sub-detector.  CPLD communicates with SPECS mezzanine through the PBUS. List of the SPECS commands: PBUS write/read of the four 16 bit channel mask registers; PBUS write/read operation of the CSR (Status/Control Register); DCU read commands for six analog outputs of the current shunt circuits; I2C write/read operation for 12 DAC threshold settings integrated circuits. CALO HV Status bits for ODIN ( firmware) 30.04.10 Anatoli Konoplyannikov

23 23 Screen short of the panel for CALO HV status Bits board monitoring and control Click on the button for open Panel. Measured Currents Min-Max Thresholds Final HV Status The Status is green when the power supply current is into a range between Min and Max threshold 30.04.10 Anatoli Konoplyannikov CALO HV Status bits for ODIN ECS control

24 24 Hardware Electronics consist of 188 eight channel integrators boards and four control and readout boards (MB5). Firmware Firmware of the control-readout board has been developed on FPGA Actel APA-300. HCAL CS calibration and PMT integrated current readout electronics 30.04.10 Anatoli Konoplyannikov 188 integrators and 4 control boards in use & Spares: 10 integrator boards; 1 control-readout board without Specs mezzanine

25 25 ECAL Integrator board readout status Info for Piquet: Each side of ECAL has 20 PMTs with the anode current integrator. PVSS panel for the PMT currents monitoring has been developed. The panel is callable from HV top level panel ECAL Cell coordinate LEDTSB channel illuminated PMT with Integrator Integrator Current (cnt) Scaling Coefficient = 31 nA / ADC_cnt (measured by Pavel) 2.06.10 Anatoli Konoplyannikov


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