1. CERN Richard Jacobsson, CERN LEADE meeting, March 29, 2004 1 Physics trigger RS TFC SwitchThrottle OR/Switch VELO FEST FEOT FE Clock Orbit Clock Orbit L0 / L1 Clock Orbit L0 / L1 Clock Orbit L0 / L1 RICH FEECAL FE... Local trigger (Optional) Clock Orbit L0 / L1 Event building network BST info in LHCb

2. CERN LEADE meeting, March 29, 2004 2 Readout Supervisor “ODIN” BUNCH_CURRENT TTCrs Q_MP Q_L0 Q_L1 TTCrx AFIFO FE_BUFFER DETECTOR_STATUS DI (EGRESS) Q_FE GbE L1BROADCAST & COMMANDS TTC_DATA L0_TRIGGER L0_DATA L0_TRG L0_DATA L1_DATA L1_TRG LHC_TTC TTC GPS DI (INGRESS) GbE FPGA FIFO MEZZANINE FPGA MEZZANINE Data flow in Readout Supervisor:

3. CERN LEADE meeting, March 29, 2004 3 “Readout Supervisor FE” 40 MHz. Data stored in FIFO (FPGA internal RAM) Bunch current 8 bits (BUNCH_CURRENT) Total 8 bits L0 Decision (~1 MHz). Data stored in L1FE Buffer (external RAM) L0 bunch current 8 bits(L0_BUNCH_CURRENT) Bunch ID (RS) 12 bits(BID) GPS 40 bits(GPS_TIME) Detector status 24 bits(DET_STATUS) L0 Event ID 32 bits (EID) Trigger type 3 bits(QUAL) L0 Force bit 1 bit(L0_FRC_OUT) Bunch ID (L0DU) 12 bits(L0_BID_OUT) BX type 2 bits(BX_TYPE) L0 synch error 1 bit(L0SNC_ERR) L0 synch error forced 1 bit(L0SNC_KEEP) Total136 bits L1 Decision (~40 kHz). Data stored in MEP buffer (FPGA internal RAM) L1 Buffer136 bits L1 Event ID 32 bits(L1EID) L0 Event ID (L1DU) 12 bits(L1_L0EID_OUT) Bunch ID (L1DU) 2 bits(L1_BID_OUT) L1 Decision 1 bit(L1_DECISION_OUT) L1 synch error BID 1 bit(L1SNC_BID_ERR) L1 synch error EID 1 bit(L1SNC_EID_ERR) L1 synch error forced 1 bit(L1SNC_KEEP) Total186 bits + L1 decision data ~24 byte

4. CERN LEADE meeting, March 29, 2004 4 LHCb BST info l GPS:  Updated every orbit and transmitted as 8 long broadcasts (64 bits UTC)  e.g. 40 bits  ms resolution: 4 bits year, 9 bits days of the year, 17 bits seconds of the day and 10 bits milliseconds. A 100 ms resolution could be obtained by dropping the year.  Bunch clock provides additional precision  Calibration of the UTC time locally can be obtained by using the LHC revolution signal provided we know all the timing of the transmitter equipment l Machine mode l Bunch scheme?