1. John DeHart An NP-Based Router for the Open Network Lab Memory Map

2. 2 - JST/JDD - 2/27/2016 SRAM ONL NP Router Rx (2 ME) HdrFmt (1 ME) Parse, Lookup, Copy (3 MEs) TCAM SRAM Mux (1 ME) Tx (1 ME) QM (1 ME) xScale xScale (3 Rings?) Assoc. Data ZBT-SRAM Plugin0Plugin1 Plugin2 Plugin3Plugin4 NN FreeList Mgr (1 ME) Tx, QM Parse Plugin XScale Stats (1 ME) Rx Mux HF Copy Plugins Tx SRAM NN Large SRAM Ring Scratch Ring NN Ring NN SRAM 64KW New Needs A Lot Of Mod. Needs Some Mod. Mostly Unchanged 64KW 512W Small SRAM Ring xScale 512W Plugin Ctrl Msgs 512W Plugin System Update Requests (Q Thresh. Filters, Etc) ARP Need ARP Except

3. 3 - JST/JDD - 2/27/2016 SRAM Usage What will be using SRAM? »Buffer descriptors Current MR supports 229,376 buffers Ø 32 Bytes per SRAM buffer descriptor –7 MBytes »Queue Descriptors Current MR supports 65536 queues Ø 16 Bytes per Queue Descriptor –1 MByte »Queue Parameters 16 Bytes per Queue Params (actually only 12 used in SRAM) Ø 1 MByte »QM Scheduling structure: Current MR supports 13109 batch buffers per QM ME Ø 44 Bytes per batch buffer –576796 Bytes »QM Port Rates 4 Bytes per port »Plugin “scratch” memory How much per plugin? »Large inter-block rings Rx  Mux  Plugins  Plugins »Stats/Counters Currently 64K sets, 16 bytes per set: 1 MByte »Lookup Results

4. 4 - JST/JDD - 2/27/2016 SRAM Bank Allocation SRAM Banks: »Bank0: 4 MB total, 2MB per NPU Same interface/bus as TCAM »Bank1-3 8 MB each Criteria for how SRAM banks should be allocated? »Size: »SRAM Bandwidth: How many SRAM accesses per packet are needed for the various SRAM uses? »QM needs buffer desc and queue desc in same bank

5. 5 - JST/JDD - 2/27/2016 Proposed SRAM Bank Allocation SRAM Bank 0: »TCAM »Lookup Results SRAM Bank 1 (2.5MB/8MB): »QM Queue Params (1MB) »QM Scheduling Struct (0.5 MB) »QM Port Rates (20B) »Large Inter-Block Rings (1MB) Ø SRAM Rings are of sizes (in Words): 0.5K, 1K, 2K, 4K, 8K, 16K, 32K, 64K Rx  Mux (2 Words per pkt): 64KW (32K pkts): 128KB XScale  Mux (3 Words per pkt): 64KW (21K pkts): 128KB  Plugin (3 Words per pkt): 64KW each (21K Pkts each): 640KB  Plugin (3 Words per pkt): 64KW (21K Pkts): 256KB SRAM Bank 2 (8MB/8MB): »Buffer Descriptors (7MB) »Queue Descriptors (1MB) SRAM Bank 3 (6MB/8MB): »Stats Counters (1MB) »Global Registers (256 * 4B) »Plugin “scratch” memory (5MB, 1MB per plugin)

6. 6 - JST/JDD - 2/27/2016 SRAM Channel 3 Plugin 0 Plugin 1 Plugin 2 Plugin 3 Plugin 4 Stats 0x000000 0x100000 0x200000 0x300000 0x400000 0x500000 0x600000 0x700000 64 Global Counters 0x700000 0x7001FF 0x7FFFFF 0x700200 0x701000 Reserved for Compiler Variables for Plugins Plugin Ctrl Rings (6 Rings, 512W each) 0x700FFF 0x703FFF 0x706000 Unallocated Copy Control Block 0x000000 0x0FFDFF RX Pkt Counters (Turned off for Perf) 0x0FFE9F 0x0FFE00 Tx Pkt Counters (turned off for Perf.) 0x0FFF3F 0x0FFEA0 Unallocated 0x0FFFFF 0x0FFF40 Unallocated 0x010200 0x0101FF HF Init Block 0x010300 Reserved for Compiler Variables for Rtr Blocks 0x010000 0x00FFFF 0x7FFFFF Unallocated 0x704000

7. 7 - JST/JDD - 2/27/2016 SRAM Channel 2 Buffer Descriptors (0x38000 * 32B) (229376 * 32B) (7MB) 0x000000 0x100000 0x200000 0x300000 0x400000 0x500000 0x600000 0x700000 Queue Desc Array (65536 * 16B = 1MB)

8. 8 - JST/JDD - 2/27/2016 SRAM Channel 1 Q Params (65536 * 16B) QM1 Sched (13109 * 44B= 0x8CD1C) QM2 Sched (13109 * 44B= 0x8CD1C) QM1 Freelist (13109 * 4B = 0xCCD4) QM2 Freelist (13109 * 4B = 0xCCD4) QM1 & QM2 Port Rates (10 * 4B) Unallocated 0x000000 0x100000 0x18CD1C 0x219A38 0x22670C 0x2333E0 0x233418 0x600000 SRAM Rings RX to Mux SRAM Ring 65536 * 4B PLC to PL0 SRAM Ring PLC to PL1 SRAM Ring PLC to PL2 SRAM Ring PLC to PL3 SRAM Ring PLC to PL4 SRAM Ring PLs to Mux SRAM Ring 0x600000 0x640000 0x680000 0x6C0000 0x700000 0x740000 0x780000 XScale to Mux SRAM Ring 0x7C0000 0x7FFFFF

9. 9 - JST/JDD - 2/27/2016 SRAM Channel 0 (2MB) RL DB Results (RL_DB_NUM * 12B) PF DB Results (PF_DB_NUM * 12B) AF DB Results (AF_DB_NUM * 12B) 0x000000 0x1FFFFF

10. 10 - JST/JDD - 2/27/2016 Scratch (16KB) 0x0000 0x0C00 0x1000 0x1400 0x1800 0x1C00 0x2000 0x2400 TO_XSCALE_LD_RING TO_XSCALE_EXC_RING COUNTER_RING FREELIST_RING MUX_TO_PLC_RING PLC_TO_QM_RING QM_TO_HF_RING (temporary) HF_TO_TX_RING UNALLOCATED 0x3FFF 0x0400 0x0800 TX Avail TBUF (4B) UNALLOCATED 0x0000 0x0004 0x00FF SRAM Ring Occupancy Counters Per ME Drop Counters 0x0100 0x01FF 0x0200 0x02FF UNALLOCATED 0x0300 0x03FF TO_XSCALE_ERR_RING 0x2800 UNALLOCATED Mux Memory 0x008F 0x007F 0x0080 0x0090