1. Injection/extraction R&D Summary S. Guiducci (INFN), Thomas Mattison (UBC) KEK - ILCDR07, 18-20 Dec 207

2. Kickers Overview ILCDR R&D MiniWorkshop KEK, Japan 18-20 December 2007 Thomas Mattison University of British Columbia

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7. 7 Clarifications from Naito-san on RDR pulse shape Prepulse (new pulsers are better) Load-reflection (new loads are better)

8. 8 Clarifications from Naito-san on Compensation Data Compensator makes actual kick start negative, but FFT data analysis shows it as positive. It should really be plotted here!

9. Kicker R&D at KEK T.Naito(KEK) ILC damping ring workshop 18/Dec/2007

10. Strip-line electrode and pulser for ATF beam extraction 9.3kV peak 2 ns/div 9. ６ kV peak 2 ns/div Two new FID GmbH pulsers, + and –, max 6MHz burst, 60 pulses. [Nice risetime, negotiating with FID about falltime]

11. Steering magnets for the local bump The steering magnets were already installed to DR. The local bump orbit will be tested soon.

12. Auxiliary septum magnet design and fabrication The design work of the auxiliary septum magnet was carried out by using OPER 2D and 3D. 1.6 mm septum thickness, 1 kG field, 1x2.5 cm gap

13. Schedule 10kV fast pulser March 2008 Fabrication strip-line electrodesMarch 2008 Local bump orbit test Jan 2008 Fabrication Septum magnet March 2008 Install strip-line electrodes and septumSpring 2008 Beam extraction test Spring 2008

14. SLAC-LLNL ILC Damping Ring Kicker High Availability Modulator R&D Program December 19, 2007 Craig Burkhart for the SLAC-LLNL Team: E. Cook (LLNL) A. Krasnykh, R. Larsen, T. Tang (SLAC)

15. 15 FY08 Inductive Adder Program 2 nd generation hybrid driver/FET circuit Module development; parallel arrays (addressing concern about single-FET switch speed) –Cascode –Hybrid Adder structures (addressing concern about transit time through adder) –Investigate “compact” structures, e.g. transmission line transformer “Scale” modulators –Identify bandwidth limitations of module and adder cell approaches

16. 16 Ultra-fast Switch R&D: Cascode (2 output FETs) Reduced loading on driver circuit Lower impedance output stage drive Higher driver voltage Short pulse duration: 2.5 ns FWHM Fast rise/fall time: <2 ns Challenge: first few pulses are different height Data courtesy of E. Cook

17. 17 Ultra-fast Switch R&D: Hybrid Die-form driver & FET Eliminate package inductance –Better control of gate charge –Reduce source LdI/dt voltage Fast output risetime: 1.2 ns (Ch1) Excellent gate control (Ch2) –High output voltage Low R DS-on V D = 400 V –Driver not optimized for short pulse Data courtesy of T. Tang

18. 18 FY08 DSRD Program Develop prototype DSRD kicker modulator –±5 kV into 50 Ω –Flattop ~2 ns, rise/fall ~1 ns (fundamental limit for 500 V p-n Si junction) –PRF thermally limited (DSRDs from Ioffe, no thermal management structure, DTI has USDOE SBIR funding (separate from HEP!) to work with VMI to commercialize DSRD with heat sinks) –Deliver to KEK for testing on ATF2

19. 19 KICKER STUDIES @ LNF David Alesini LNF fast kickers study group* * D. Alesini, F. Marcellini P. Raimondi, S. Guiducci.

20. 20 A commercial feedthrough (not 50 Ohm) has been initially tested without success. Several FID GmbH HV pulser have been tested up to the final version under specification: 45 kV, flat top 5 ns An HV feedthrough at 50 Ohm has been designed, realized and tested at LNF with complete success up to 50 kV with the FID pulser. R&D on HV feedthrough (2/2)

21. 21 RF test (Network Anal.) on the new injection kickers Connectors for RF test with NA

22. 22 New pulser (FID) HV tests on the new kickers (3/3) Old pulser (LNF)

23. 23 New pulser (FID) Old pulser (LNF) HV tests on the new kickers (2/3) 25 kV 250 ns 45 kV 5 ns

24. 24 Installation in the DA  NE rings (Nov. 07) e+ IP the kickers have been connected to the old pulser systems

25. 25 Future programs - Substitution of the old long pulser with the FID pulsers (positron ring) -HV load R&D -Timing control - Beam coupling impedance measurements on fast kickers (wire method) - Installation in DAFNE of “dump” kickers (2 more kickers already built). -This will allow to make tests on the beam with pulsers of different types.

26. 26 42 striplines Length 30 cm Voltage ±5 KV Gap 30 mm 23 striplines Length 30 cm Voltage ±10 KV Gap 70 mm 4 sections 180º phase advance About the injection optics

27. 27 Injection line - New version Taking into account: septum thickness 4 mm kickers good field region Good safety margin for failures: with a ± 10 KV pulser we could use 29/36 striplines Injection lattice design has enough flexibility!

28. 28 Proposal for Discussion

29. 29 Insertion Lattice Discussion Agreement that we must allow for rise-fall and packing fraction inefficiencies Did not reach agreement on FODO vs TME Did not agree on 1 vs several kicker clusters Did agree there’s time to change our minds… Some think there’s enough contingency space in proposed layout Mattison (and engineers) strongly advocate staking out space now for kicker contingencies, e.g., a few extra cells worth of length where kickers could be installed, no matter what lattice is shown to occupy them today.

30. 30 Work Package 14 Injection and Extraction systems First meeting of WP14 after the specification of deliverables and resources In the following I’ll try to organize regularly short (phone)meetings to exchange information I’ll give a short description of the WP activities and leave time to the discussion

31. 31 Work Package 14 Injection and Extraction systems Deliverable title Design damping rings injection/extraction system satisfying specifications for 6 ns and 3 ns bunch spacing Date to be achieved 06/2010 Collaborating institutes LNF (Coord.), KEK, SLAC, LLNL

32. 32 Brief description of deliverable Develop injection/extraction kickers and fast pulser satisfying damping ring specifications The total kickers pulse duration should be less than twice the bunch spacing (6 ns and 3 ns) with a burst frequency of 3MHz and 6Mhz respectively Perform beam test of fast pulser and stripline system to demonstrate specifications on pulse time structure, time and amplitude jitter, long-term reliability and stability. Design damping rings injection/extraction system satisfying specifications for 6 ns and 3 ns bunch spacing.

33. 33 Major tasks and milestones Install single-bunch extraction system in ATF Demonstrate single-bunch extraction from ATF Develop fast high-power pulser meeting damping ring specifications Develop technical design for kicker striplines Perform beam tests of available fast pulsers with kicker striplines at ATF and DAFNE Design damping ring injection/extraction system

34. 34 Input for other Work Packages WP1 - Lattice design and acceptance : integrated strength, good field region and number of kickers WP4 - Instrumentation, diagnostics, controls: timing and control specifications for fast pulsers WP5 - Impedance and impedance driven instabilities: beam impedance of stripline kickers WP13 - Vacuum system: design of kickers vacuum chamber

35. 35 Work Packages providing input WP1- Lattice design and acceptance: Lattice of injection/extraction sections WP13 - Vacuum system: Vacuum specifications of kickers vacuum chamber

36. 36 Resources 2008 - 2010 Proposed by LNF, KEK, SLAC, LLNL beginning of November Other labs expressed an interest: Cornell, LBNL, UIUC Physicists and Engineers Support Staff and Technicians Materials and travel (k$) 20084.02.2245 20094.82.2395 20102.00.593

37. 37 SLAC - LLNL Plans DSRD program –develop a ±5 kV modulator that will be delivered to KEK under the US-Japan joint research program. –goal parameters: ~1 ns rise and fall times, ~2 ns flattop, into 50 ohms –use a pair of DSRDs from Ioffe (St. Petersburg) that will not have any internal heat sinks. Therefore, the effects of thermal loading may limit the maximum prf and/or pulse train length. –The output stage will be pumped by a MOSFET array developed at LLNL. – Diversified technologies, Inc. will work with Voltage Multipliers, Inc, to commercialize the Ioffe DSRD technology. This will also include the improvements in packaging and thermal handling of DSRD junctions required to achieve higher voltages at high prf.

38. 38 SLAC Plans Inductive adder program –attempt to refine the high switching speed circuits, Cascode and hybrid driver/FET, demonstrated in FY07 and combine them into parallel arrays capable of 400 A (required current for an inductive adder of ±10 kV into 50 ohm). –We have concluded that it is unlikely that conventional inductive adder structures can achieve the <1 ns rise/fall time required for 3 ns bunch spacing. Therefore, we plan to investigate alternative adder designs; such as the transmission-line transformer. A scale system (~2 to 5 kV) will be tested as soon as the driver arrays are available.

39. 39 KEK plans Demonstrate single bunch extraction at ATF with trains of 20 bunches, 3 ns bunch distance and 3MHz repetition frequency –two 10kV, 3 MHZ pulsers from FID Co. are under test and other two have been ordered –Strip line design is done –Since there is no space for installing enough strip-line kickers an orbit bump and an auxiliary septum magnet will be added –Beam extraction test spring 2008 Continue beam tests of available pulsers

40. 40 LNF Plans Test timing stabilization system with Fid pulsers –Time difference between the to kickers of the injection bump must be stable within tens of ps Commission DAFNE kickers for stable operation during luminosity runs –Test pulsers robusteness –Test the kicker system at high currents 1-2 A Install an abort kicker that can be used to test other pulsers Continue design and optimization of ILC DR striplines

41. 41 Pulse shape Development of fast pulser is certainly the most challanging issue We will pursue all the solutions that allow relaxing the pulser specifications, an example: –Apply Naito’s solution to reduce the rise time with an extra kicker of opposite sign (test long term stability of the compensation) –Take advantage of the fact that bunch trains are extracted starting from the tail of the train and relax the requirement on the fall time of the kickers* –With the above conditions consider using a longer stripline (45 cm for maximum efficiency) to reduce the voltage * G. Penn, "Timing Issues for ILC Damping Rings" (May 2007) https://wiki.lepp.cornell.edu/ilc/pub/Public/DampingRings/WebHome/ilc_timing.pdf

42. 42 Final Deliverable: Design injection/extraction systems Specifications (Existence proof?) of the pulsers based on beam tests Optimized design of striplines electrodes –for ILC dimensions, not just DA  NE & ATF Information for updated lattice design (WP1) Kickers vacuum chamber design (WP13) Impedance evaluation (WP5) Timing signal control and stabilization (WP4) Layout and requirements for conventional facilities (WP16)