1. Chapter 13 RISC Peter Wong CS147 Fall2010

2. What is RISC? RISC, or Reduced Instruction Set Computer. is a type of microprocessor architecture that utilizes a small, highly-optimized set of instructions, rather than a more specialized set of instructions often found in other types of architectures.

3. History The first RISC projects came from IBM, Stanford, and UC-Berkeley in the late 70s and early 80s. The IBM 801, Stanford MIPS, and Berkeley RISC 1 and 2 were all designed with a similar philosophy which has become known as RISC.

4. Instruction Execution Characteristic Operation perform Operands used Execution sequencing

5. A microproccesor typically breaks the execution of an instruction into smaller operations. Each of these operations completes a portion of the entire instruction's execution.

6. Large Register File Register Windows How is this important to RISC ? Large Register vs. Cache

7. Data in the register file is ready to use when the processor needs it. Behave like cache memory only faster.

8. CRO CRO: Compiler-Based Register Optimization

9. RISA RISA- Reduced Instruction Set Architecture Characteristic of RISA CISC CISC vs RISC

11. RISC vs. CISC The RISC machine executes instructions faster because it does not have to go through a microcode conversion layer. The RISC compiler generates more instructions than the CISC compiler for the same processing.

12. RISC Pipelining Non pipelining

13. Pipeling

14. Other Architecture MIPS R4000 SPARC

15. MIPS Russian’s First MIPS

16. MIPS R4000 The Sony PSP

17. MIPS64 Dish Network

18. SPARC Sun Micro System

19. Reference Google.com Wiki.com Webdictionary Sun.com Standford.edu