1. ECEN 248: INTRODUCTION TO DIGITAL SYSTEMS DESIGN Dr. Shi Dept. of Electrical and Computer Engineering

2. Slides courtesy Dr. A. D EMOSTHENOUS UNIVERSITY COLLEGE OF LONDON

3. Asynchronous sequential circuits:  Do not use clock pulses.  The change of internal state occurs when there is a change in the input variable.  Their memory elements are either unclocked flip-flops or time-delay elements.  They often resemble combinational circuits with feedback.  Their synthesis is much more difficult than the synthesis of clocked synchronous sequential circuits.  They are used when speed of operation is important.

4. Definitions  The present state variables (y 1 to y k ) are called secondary variables. The next state variables (Y 1 to Y k ) are called excitation variables.  Assumption: The input signals change one at a time and only when the circuit is in a stable condition.

5. Example  The analysis of the circuit starts by considering the excitation variables (Y 1 and Y 2 ) as outputs and the secondary variables (y 1 and y 2 ) as inputs.

6. Transition Table

7. State Table

8. Example

9. Flow Tables of Previous Examples

10. Race  A race condition exists in an asynchronous circuit when two or more binary state variables change value in response to a change in an input variable. Non Critical

11. Critical race Critical Race

12. Cycles to avoid Races  Unique path

13. Example Circuit

14. SR Latch

15. Constraints on Inputs