1. Pattern Recognition System Update Rod Webb, Bob Manning and Xuelin Yang Photonic Systems Group, Tyndall National Institute, University College Cork, Ireland rod.webb@tyndall.ie

2. Photonic Systems Group, Tyndall National Institute, Ireland Outline  Review of operating principle  Experiment 1 oDemonstration of key functions  Experiment 2: regenerated loop oImproved configuration oInitial results  Next steps

3. Photonic Systems Group, Tyndall National Institute, Ireland Operating principle: basic system CIP integrated regenerator Pulse in last frame shows position of target Data (n bits repeated) Target pattern at bit-rate/n Output Initialising clock burst SOA1 SOA2 nTnT (n+1)T Optical or electrical input to SOA tt A B C Pattern recognition system oFor port number recognition, sync pulse generation, etc. oTrades gate-count for latency oEasily generated low-speed target compared with high-speed input data

4. Photonic Systems Group, Tyndall National Institute, Ireland Operating principle: example data A: Data (n bits repeated) B: Target pattern at bit-rate/n A 0 A 1 A 2 A 3 A 4 A 5 C 00 C 01 C 02 C 03 C 04 C 05 C 10 C 11 C 12 C 13 C 14 C 15 C 20 C 21 C 22 C 23 C 24 C 25 C 30 C 31 C 32 C 33 C 34 C 35 B0B0 B1B1 B2B2 B3B3 Y 00 Y 01 Y 02 Y 03 Y 04 Y 05 Y 10 Y 11 Y 12 Y 13 Y 14 Y 15 Y 20 Y 21 Y 22 Y 23 Y 24 Y 25 Y 30 Y 31 Y 32 Y 33 Y 34 Y 35 Y: Output C: Probe input Initialising clock burst SOA1 SOA2 nTnT (n+1)T tt A B C Y Y Equivalent logic circuit A B C ( ( n n + + 1 1 ) ) T T XOR O O R R A A N N D D n T

5. Photonic Systems Group, Tyndall National Institute, Ireland Outline  Review of operating principle  Experiment 1 oDemonstration of key functions  Experiment 2: regenerated loop oImproved configuration oInitial results  Next steps

6. Photonic Systems Group, Tyndall National Institute, Ireland CW @ 1Hz. A B C ( ( n n + + 1 1 ) ) T T XOR O O R R A A N N D D n T Original data (target = 1) Inverted data (target = 0) Combined eye diagram, original and inverted data Key function: inversion of 10Gb/s data by pattern SOA1 SOA2 Repeated data (PRBS 2 7 -1) 10Gb/s “Target” pattern (1Hz square wave) 2 4 1 1 Clock Data XOR Target

7. Photonic Systems Group, Tyndall National Institute, Ireland CW @ 1Hz. SOA 1 SOA 2 Repeated data (PRBS 27-1) 40Gb/s “Target” pattern (1Hz square wave) 2 4 1 Push Pull 1 Clock Key function: inversion of 40Gb/s data by pattern Data XOR Target Original data (target = 1) Inverted data (target = 0) Combined eye diagram, original and inverted data Eye diagram, original data only

8. Photonic Systems Group, Tyndall National Institute, Ireland Key function: loop + AND gate SOA1 SOA2 atten delay atten delay atten delay SOA Repeated data 10-40Gb/s Initialising clock burst No target applied 1 3 3 3 Output Push Pull A B C ( ( n n + + 1 1 ) ) T T XOR O O R R A A N N D D n T Performance limited by Amplified Spontaneous Emission (ASE) m=0 1 2 3 4 Loop length Data = (0000000011111111) repeated. Target defaults to 11111111

9. Photonic Systems Group, Tyndall National Institute, Ireland Outline  Review of operating principle  Experiment 1 oDemonstration of key functions  Experiment 2: regenerated loop oImproved configuration oInitial results  Next steps

10. Photonic Systems Group, Tyndall National Institute, Ireland Improved configuration with regenerated loop SOA1 SOA2 nTnT (n+1)T tt A B C SOA1 SOA2 Repeated data 10-40Gb/s Target pattern 2 4 1 Output Push Pull 1 Clock SOA1 SOA2 SOA1 SOA2 delay 3 1 3 Initialise Probe with reset Regenerated Loop length (n+1)T Data XOR Target Regenerators A B C ( ( n n + + 1 1 ) ) T T XOR O O R R A A N N D D n T

11. Photonic Systems Group, Tyndall National Institute, Ireland 3 Output SOA1 SOA2 SOA3 SOA4 delay 2 =1558nm 1 3 =1540nm 90:10 50:50 3 Probe with reset Data, 3ps pulses Linear SOA Monitor 4nm 1 =1550nm 1 1 VOA Initial pulse Regenerated loop experiment 10Gb/s delay 4nm VOA Experimental arrangement delay

12. Photonic Systems Group, Tyndall National Institute, Ireland Regenerated loop results Data = (0000000011111111) repeated. Target defaults to 11111111 m=0 1 2 3 4 5….. Loop length 168ns “Random” data including 8 ones “Random” data including 16 ones

13. Photonic Systems Group, Tyndall National Institute, Ireland Outline  Review of operating principle  Experiment 1 oDemonstration of key functions  Experiment 2: regenerated loop oImproved configuration oInitial results  Next steps

14. Photonic Systems Group, Tyndall National Institute, Ireland Next steps 1.Upgrade loop to 40Gb/s 2.Introduce target pattern 3.Combine with storage loop SOA1 SOA2 Repeated data 10-40Gb/s Target pattern 2 4 1 Output Push Pull 1 Clock SOA1 SOA2 SOA1 SOA2 delay 3 1 3 Initialise Probe with reset Regenerated Loop length (n+1)T Data XOR Target diff(Target) CW probe Probe with reset Pattern Storage Loop length nT Data burst 2 4 Output 1 Clock SOA1 SOA2 SOA1 SOA2 delay 3 1 3 Initialising pulse Sequential Comparison Loop length (n+1)T SOA1 SOA2 SOA1 SOA 2 delay 1 3 3 Invert control 3

15. Photonic Systems Group, Tyndall National Institute, Ireland Summary  Inversion of data with target demonstrated at 10 and 40Gb/s  Single-gate system limited by ASE  New regenerated loop configuration demonstrated oDetection of patterns up to 16 bits demonstrated in 10Gb/s data  Proposal for system including data storage loop

16. Photonic Systems Group, Tyndall National Institute, Ireland Control signals nTnT Target pattern: arbitrary programmable waveform (T = data bit period) Data selection window Block CW probe for reset Initialising pulse Output gate window Timings shown relative to notional data pulse. Will need to be variable to suit optical circuit delays Signals need to drive modulators, DFBs, or SOAs. Therefore need ~5V into 50 ohms. n will depend on length of data burst that needs to be examined. In initial experiments, the minimum nT is around 100ns because of the lengths of connecting fibres. With integrated optical circuits, much shorter delays will become possible. Risetimes should be a few hundred ps.