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Jiahao Chen, Yuhui Deng, Zhan Huang 1 ICA3PP2015: The 15th International Conference on Algorithms and Architectures for Parallel Processing. zhangjiajie, China Department of Computer Science, Jinan University Data Storage and Cluster Computing Lab http:// dsc.jnu.edu.cn
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Motivation & Challenges Related work Our idea Evaluation Conclusion 2
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Hot data identification can be applied to many fields for optimization. To enhance the performance. E.g. Intel's SSD 311 20GB: Designed to Cache. To conserve energy. E.g. Cloud Computing as an Energy Saving Tool. 3
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The traditional algorithm has defects and deficiencies. Simply record the occurrences of the data items. Ignore the volume of the corresponding data set. Incur large memory consumption or a high runtime overhead. Do not consider the temporal locality. 4
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Two-level LRU(TLL) 5 Both two lists have a fixed length and are LRU lists. if the data is found in the hot list, it is regarded as a hot data. Otherwise, it is treated as cold data. If the data is in the candidate list, then the data is promoted to the hot list when it is accesses again. If the data is not in both lists, they are inserted to the candidate list. Its performance relies heavily on the length of the two lists. High run-time overhead. Low memory consumption.
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Multiple Hash Function Framework(MHF) 6 Relatively low memory overhead and run-time overhead. It does not catch recency information appropriately MHF adopts multiple K hash functions and a D-bit counter. If all K-bit positions (from the k-hash functions) are set to 1, the data is regard as a hot data. K Hash values correspond to each bit position in the bloom filter. MHF records the data access information by incrementing the corresponding counters. It updates the data access information by periodically dividing the counter by 2. Here, K=4, D=4 and B=2.
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7 HDCat consists of a hot list and a candidate hot list. Each item on the list contains a recency bit and a D-bit counter. The D-bit counter is used to store the access frequency. The recency bit is adopted to identify whether the associated item is recently accessed. If any list contains the forthcoming data, the D-bit counter will be increased. If a data is on the candidate list and its D-bit counter is bigger than a given hot threshold, this data is promoted to the hot list. If the hot list is full, a data item on the hot list will be demoted to the candidate hot list. If the two lists do not contain the new data, a data item on the candidate list will be evicted and the new data item will be recorded on the candidate hot list.
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HDCat consists of three parts: Filtering mechanism When a list is full and a new data item has to be inserted into this list, it invokes the filtering mechanism. Sampling mechanism If a forthcoming data item is not on the both lists, but it would be inserted to the candidate hot list, a sampling mechanism is triggered to handle this scenario. Aging mechanism HDCat employs an aging mechanism to update the data access information. 8
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Filtering mechanism( including two parts ) When a list (including the hot list and the candidate list) is full and a new data item has to be inserted into this list, it invokes the filtering mechanism. The first part: selecting the data item that has the minimum value of the 4-bit counter in S0 and removing it (S1 represents a data set that the recency bit of the data is 1 and the data has been recently visited. S0 represents the remaining data.). The second part : If there is no data item with the recency bit setting to 0, this part will select a data item from S1. Similarly, the data item with the minimal counter value is selected. After finishing the filtering process, the recency bits of all data items are changed to 0 except the newly added one. The data item removed from hot list will be inserted into the candidate hot list. If the candidate hot list is full, we will perform the filtering mechanism on the candidate hot list with the same process. This is the conversion between hot and cold data. 9
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Sampling mechanism If a forthcoming data item is not on the both lists, but it would be inserted to the candidate hot list, a sampling mechanism is triggered to handle this. The mechanism puts the forthcoming data item on the candidate hot list with a certain probability, thus avoiding the frequent conversion between hot data and cold data, and further reducing the runtime overhead of the algorithm. For example, we can insert a new data item to the candidate hot list with a 50% probability. This mechanism will not change the probability that a frequently accessed data item is inserted to the candidate hot list. Since the data is frequently accessed, the opportunity of passing this sampling is also bigger than other data. However, this simple sampling mechanism helps HDCat discard those infrequently accessed data at a very early stage. Therefore, it reduces not only memory consumption, but also computational overhead. 10
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11 Aging mechanism HDCat employs an aging mechanism to update the data access information. It cuts all the values of the D-bit counters by half within a fixed period of time, thus updating the data access information. Therefore, even if one data item is frequently accessed in the past, as long as it is no longer frequently visited over a certain period of time, this data item will eventually become a cold data and be demoted from the hot list. The aging mechanism of HDCat employs M arrays, each array consists of a 4-bit BF as the counter.
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12 The algorithm of HDCat
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Evaluation Environment 13 System Parameters and Values Workload Characteristics
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14 Hit Ratio of three algorithms with different traces Both HDCat and MHF have a much higher hit ratio than that of TLL. Hit ratios of TLL are lagged far hehind when using HM trace and WDEV trace but not in RSRCH.
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15 Total hit ratio of three algorithms with three traces. HDCat significantly outperforms MHF and TLL.
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16 Total Hit Ratio under different cache capacity. The hit ratio of TLL grows significantly with the increase of Cache capacity. where X axis represents the size of cache capacity. (e.g. number 12 represents that the size of cache is 212 =4096.)
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17 Frequency of hot/cold data conversion. HDCat incurs the minimal number of conversions across the three traces. This feature can be leveraged by some applications.
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Total conversion of three algorithms with three traces HDCat significantly outperforms MHF and TLL. 18
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HDCat can accurately capture the temporal locality of data access patterns and achieve a high hit ratio with low cache capacity and runtime overhead. HDCat significantly reduces the number of conversions between hot and cold data. HDCat can be applied to many scenarios to optimize the computer systems. 19
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20 ICA3PP2015: The 15th International Conference on Algorithms and Architectures for Parallel Processing. zhangjiajie, China http:// dsc.jnu.edu.cn
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