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The objective of Nonlinear Equalization (NLEQ) is to extend the dynamic range of RF receivers by reducing in-band nonlinear distortions. This enables detection of weak targets otherwise masked by distortions present after digital integration. Nonlinear Equalization (NLEQ) of RF Receivers HPC-Enabled Search for a Near-Optimal NLEQ Architecture Benjamin Miller 1, Gil Raz 2, Brandon Kam 1, Joel Goodman 1 / 1 MIT Lincoln Laboratory, 2 GMR Research & Technology, Inc. Typical Values Combinatorial Search Greedy Search M = 1,200, N=20~10 43 24,000 M = 11,400, N = 80~10 205 912,000 Frequency (bin) Nonlinear Distortions Before Equalization Power (dB) Target Method The Partitioned Horizontal Coordinate System (PHoCS) is a “pruned” version of the highly over-parameterized Volterra kernel. n1n1 h 3 (n 1, 2, 3 ) 22 33 n3n3 n2n2 n1n1 22 33 n3n3 n2n2 n3n3 n2n2 Computational Complexity Volterra Filter PHoCS with Global Search PHoCS with Greedy Search NLEQ Coefficients Architectures Tested in Search N/A With parallelization, experiments take days rather than months NLEQ improves wideband ADC dynamic range by up to 27 dB, a 27-year improvement! x(n) X Z -L+1 Z -1 X X h 2 (0,0) X h 2 (0,1) X h 2 (L-1,L-1) X y 2 (n) x 2 (n) x(n)x(n-1) x 2 (n-L+1) Second-order Volterra Kernel (Traditional Method for Polynomial Filtering) Greedy Search Algorithm: 1) Find the PE that equalizes best with the current NLEQ architecture 2) Add this PE to the architecture 3) Repeat until there are N PEs in the architecture NLEQ PE 1 PE i PE M NLEQ PE i Lowest MSE LLGrid Even with these improvements, a typical experiment requires over 5x10 14 operations! As illustrated in the chart above, the goal of NLEQ is to increase the intermod-free dynamic range of the analog-to-digital converter (ADC) decades beyond the state-the-art. Construct frequency- domain database of multi-tonal signals Identify architecture using the greedy algorithm Verify performance of identified architecture NLEQ Architecture Search Procedure This work is sponsored by the Defense Advanced Research Projects Administration under Air Force Contract FA8721-05-C-0002. Opinions, interpretations, conclusions, and recommendations are those of the authors and are not necessarily endorsed by the United States Government MEASURED results with MAX108 ADC at 1.5 GSPS, 500MHz instantaneous bandwidth Full Volterra Globally Optimal PHoCS n1n1 Locally Optimal PHoCS To Lincoln LAN Jobs partitioned using MatlabMPI Configuration Server Resource Manager Network Storage Service Nodes Compute Nodes Cluster Switch LAN Switch 10 6 10 7 10 8 10 9 Resolution (BITS) 16 14 12 10 8 6 10 Dynamic Range (dB) 80 60 40 Effective Bandwidth 200520112017 Goal IFDR ADC performance improves on average ~1dB/year SNR Results E-3 AWACS FLTSAT RC-135V Rivet Joint Tier II+ UAV Discoverer II Standard Missile E-2C Hawkeye Aegis Cruiser TEL Airborne Early Warning (Space-Time Adaptive Processing) SIGINT SAR GMTI SAR STAP Small Unit Operations Signal Processing Upgrade Secure Comm Power (dB) Range Clutter Jammer Noise Dynamic Range Target Objective Typical ValuesVolterra coeffsPHoCS coeffs p=5, L=8, N=10127880 p=9, L=10, N=2092367200 After Equalization Frequency (bin) Power (dB) > 20 dB Dynamic Range Improvement Target Processing Element (PE) PHoCS Architecture H1H1 HNHN Eq. Coef. X Z - p-1 Partition Filter 1 Partition Filter p-1 Z-1Z-1
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