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© 2008, Renesas Technology America, Inc., All Rights Reserved 1 Introduction Purpose  This training course demonstrates the Project Generator function.

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Presentation on theme: "© 2008, Renesas Technology America, Inc., All Rights Reserved 1 Introduction Purpose  This training course demonstrates the Project Generator function."— Presentation transcript:

1 © 2008, Renesas Technology America, Inc., All Rights Reserved 1 Introduction Purpose  This training course demonstrates the Project Generator function of the High- performance Embedded Workshop (HEW), a key tool for developing software for embedded systems that use microcontrollers (MCUs) from Renesas Technology Corp. Objectives  Review the basic capabilities of the HEW Project Generator.  Learn the steps involved in setting up a workspace and generating code.  Understand program flow and the basic structure of the files created. Content  24 pages  2 questions Learning Time  40 minutes

2 © 2008, Renesas Technology America, Inc., All Rights Reserved 2 HEW Project Generator Project Generator Compiler Assembler Linker Toolchain

3 © 2008, Renesas Technology America, Inc., All Rights Reserved 3 Welcome Dialog From this section you can do the following: –Create a new Project Workspace –Open a recent Project Workspace –Browse for any Project Workspace From this section you can do the following: –Create a new Project Workspace –Open a recent Project Workspace –Browse for any Project Workspace To begin: Invoke HEW from the “Start” menu or double-click on HEW2.exe

4 © 2008, Renesas Technology America, Inc., All Rights Reserved 4  Just a few simple steps set up a new workspace: - Choose workspace name - Select CPU family and model - Select toolchain –Determines project types - The H8S, H8/300 Toolchain supports six project types :  Application  Assembly Application  Demonstration  Empty Application  Import Makefile  Library  Clicking the “Properties” button provides more information  Just a few simple steps set up a new workspace: - Choose workspace name - Select CPU family and model - Select toolchain –Determines project types - The H8S, H8/300 Toolchain supports six project types :  Application  Assembly Application  Demonstration  Empty Application  Import Makefile  Library  Clicking the “Properties” button provides more information New Project Workspace Help is available at all times

5 © 2008, Renesas Technology America, Inc., All Rights Reserved 5 Starting a New Project Nine dialog screens are used to set up the Project Generator The first dialog asks the following:  Toolchain version  CPU series  CPU type The respective I/O files will be generated according to the CPU series and type that have been selected Nine dialog screens are used to set up the Project Generator The first dialog asks the following:  Toolchain version  CPU series  CPU type The respective I/O files will be generated according to the CPU series and type that have been selected If your CPU type isn’t shown, choose a similar device or “Other.” If you select “Other,” a header file will not be generated.

6 © 2008, Renesas Technology America, Inc., All Rights Reserved 6  Global options are set based on toolchain and CPU selections  Dialog settings cover the following: –Operating Mode –Address Space –Multiple/Divide –Merit of Library –Stack calculation –Specify SBR address  Operating Mode choice affects generated code and section mapping  Global options are set based on toolchain and CPU selections  Dialog settings cover the following: –Operating Mode –Address Space –Multiple/Divide –Merit of Library –Stack calculation –Specify SBR address  Operating Mode choice affects generated code and section mapping Setting Options

7 © 2008, Renesas Technology America, Inc., All Rights Reserved 7 Additional settings must be made that relate to the microcontroller previously selected  Select the specific Global Options for this project and future projects to be inserted to this workspace  Settings in this Dialog: –Operating Mode –Address Space –Multiple/Divide –Merit of Library –Stack calculation –Specify SBR address (H8SX CPU only) Additional settings must be made that relate to the microcontroller previously selected  Select the specific Global Options for this project and future projects to be inserted to this workspace  Settings in this Dialog: –Operating Mode –Address Space –Multiple/Divide –Merit of Library –Stack calculation –Specify SBR address (H8SX CPU only) Global Options

8 © 2008, Renesas Technology America, Inc., All Rights Reserved 8 Setting Contents of Files Project Generator configures the initialization routine The settings made here will determine the types of files that will be generated - Use I/O Library - Use Heap Memory - Generate “main()” Function - I/O Register Definition Files - Generate Hardware Setup Function Project Generator configures the initialization routine The settings made here will determine the types of files that will be generated - Use I/O Library - Use Heap Memory - Generate “main()” Function - I/O Register Definition Files - Generate Hardware Setup Function

9 © 2008, Renesas Technology America, Inc., All Rights Reserved 9 Choose Standard HEW Libraries  Project Generator generates code for the Standard Toolchain Libraries that are selected  Default settings: “runtime,” “new,” “stdio,” and “stdlib”  Library files must be included in source files  Project Generator generates code for the Standard Toolchain Libraries that are selected  Default settings: “runtime,” “new,” “stdio,” and “stdlib”  Library files must be included in source files The more libraries there are, the longer the initial compilation time

10 © 2008, Renesas Technology America, Inc., All Rights Reserved 10 Setting the Stack Area Two stack settings must be made:  Stack pointer address  Stack size Modify settings Generated by Project Generator

11 © 2008, Renesas Technology America, Inc., All Rights Reserved 11 Setting the Vector Project Generator creates the supporting files  Vector Definition Files  Vector Handlers Generate

12 © 2008, Renesas Technology America, Inc., All Rights Reserved 12 Setting Target for Debugging  Target system (platform) can be a simulator or an emulator  Choices for targets depend on the CPU selected earlier  Target type can be changed using this dialog screen - For accurate debugging results, the target must be one that is appropriate for the CPU  If no target type is selected, this information must be entered manually after project generation process is complete  Target system (platform) can be a simulator or an emulator  Choices for targets depend on the CPU selected earlier  Target type can be changed using this dialog screen - For accurate debugging results, the target must be one that is appropriate for the CPU  If no target type is selected, this information must be entered manually after project generation process is complete

13 © 2008, Renesas Technology America, Inc., All Rights Reserved 13 Setting the Debugger Options Debugger options depend on target platform previously selected Settings include the following:  Target name  Configuration name  Detail options Debugger options depend on target platform previously selected Settings include the following:  Target name  Configuration name  Detail options If no Target was selected in the previous screen, this dialog will not appear.

14 © 2008, Renesas Technology America, Inc., All Rights Reserved 14 Changing the File Names  Project Generator displays a list of files to be generated  File names can be changed by left double-clicking on the name  A short description of the file accompanies the file name  Project Generator displays a list of files to be generated  File names can be changed by left double-clicking on the name  A short description of the file accompanies the file name

15 © 2008, Renesas Technology America, Inc., All Rights Reserved 15 Project Generator Output Workspace Project Files

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18 © 2008, Renesas Technology America, Inc., All Rights Reserved 18 A Closer Look at the Files Intprg.c Iodefine.h, hwsetup.c Dbsct.c Reset.c PowerON_Reset() Main program Project Generator Files An embedded system programming project requires the following: - Vector table - I/O register definitions and sample code - Section and environment setup program - Reset program - Main program The HEW Project Generator automatically generates all of the requisite files - Shortens development time - Reduces coding error

19 © 2008, Renesas Technology America, Inc., All Rights Reserved 19 MCU and HEW Program Flow MCU ProcessHEW Program Flow Power UpResetprg.c InitializationDbsct.c, Hwsetup.c Interrupt RoutinesIntprg.c MainProject.c Main File

20 © 2008, Renesas Technology America, Inc., All Rights Reserved 20 #include extern void main (void); /* refer to extern function */ __entry(vect=0) void PowerON_Reset(void); /* declaration of function */ #pragma section ResetPRG /* put in “ResetPRG” section */ __entry(vect=0) void PowerON_Reset(void) { set_imask_ccr((_UBYTE)1); /* Mask all interrupt from being service*/ _INITSCT( ); /* Calls section init routine, __INITSCT */ set_imask_ccr((_UBYTE) 0); /* Accept interrupt*/ main( ); /* Calls main routine */ sleep( ); }; Power on Call main() Power-on and Reset Functions First stage of initialization

21 © 2008, Renesas Technology America, Inc., All Rights Reserved 21 #pragma section $DSEC static const struct { _UBYTE *rom_s; /* Start address of the initialized data section in ROM */ _UBYTE *rom_e; /* End address of the initialized data section in ROM */ _UBYTE *ram_s; /* Start address of the initialized data section in RAM */ }DTBL[]= { {__sectop("D"), __secend("D"), __sectop("R")}, }; #pragma section $BSEC static const struct { _UBYTE *b_s; /* Start address of non-initialized data section */ _UBYTE *b_e; /* End address of non-initialized data section */ }BTBL[]= { {__sectop("B"), __secend("B")}, }; Interrupt vector Program area Constant area Initialized data area Non-initialized data area ROM RAM  Copy initialized data area from ROM to RAM  Clear non-initialized data area to zero Dbsct.c Second Stage of Initialization

22 © 2008, Renesas Technology America, Inc., All Rights Reserved 22 #ifdef __cplusplus extern "C" { #endif void abort(void); #ifdef __cplusplus } #endif void main(void) { } #ifdef __cplusplus void abort(void) { } #endif Main entry point Third Stage of Initialization

23 © 2008, Renesas Technology America, Inc., All Rights Reserved 23 #include #pragma section IntPRG // vector 1 Reserved // vector 2 Reserved // vector 3 Reserved // vector 4 Illegal code __interrupt(vect=4) void INT_Illegal_code(void){/* sleep(); */} // vector 5 Trace __interrupt(vect=5) void INT_Trace(void){/* sleep(); */} // vector 6 Reserved // vector 7 NMI __interrupt(vect=7) void INT_NMI(void){/* sleep(); */} // vector 8 trap #0 __interrupt(vect=8) void INT_TRAP0(void){/* sleep(); */} // vector 9 trap #1 __interrupt(vect=9) void INT_TRAP1(void){/* sleep(); */} // vector 10 trap #2 __interrupt(vect=10) void INT_TRAP2(void){/* sleep(); */} // vector 11 trap #3 __interrupt(vect=11) void INT_TRAP3(void){/* sleep(); */} // vector 12 CPU Address error __interrupt(vect=12) void INT_CPU_Address(void){/* sleep(); */} // vector 13 DMA Address error __interrupt(vect=13) void INT_DMA_Address(void){/* sleep(); */} // vector 14 Reserved Interrupt service routines Final Stage of Initialization

24 © 2008, Renesas Technology America, Inc., All Rights Reserved 24 Is the following statement true or false? Click Done when you are finished. “By automatically generating all the files needed to start an embedded system coding project, the HEW Project Generator helps you shorten the development cycle and reduces the possibility of error in the basic code.” True False Done Question

25 © 2008, Renesas Technology America, Inc., All Rights Reserved 25  Project Generator features  Setting up a New Project workspace  Code generated by HEW Course Summary Download a free evaluation copy of HEW @ www.renesas.com/hew


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