1. 11. FM Receiver Circuits. FM Reception RF Amplifiers Limiters
Discriminators
Phase-Locked Loop

2. Discriminator circuit
FM Reception
Demodulated Signal
FM wave
FM receiver
RF amplifier
Demodulated Signal
Mixer
Local Oscillator
IF amplifier
Limiter circuit
Discriminator circuit
De-emphasis circuit
AGC
AF and power amplifier

3. RF Amplifiers Advantages of RF amplifiers in FM receivers
Broadcast AM receivers normally operate quite satisfactorily without RF amplifiers. This is rarely the case with FM receivers, however, except for frequencies in excess of 1GHz when it becomes preferable to omit it. The essence of the problem is that FM receivers can function with smaller received signals than AM or SSB receivers because of their inherent noise reduction capability.
With input signals 1mV or less as compared with perhaps a 30mV minimum input for AM. High noise factor of the mixer stage destroys the intelligibility of the 1mV signal. It is therefore required to amplify the signal up to at least 10 to 20 mV before mixer stage.
It can tolerate 1mV of noise with a 20mV of signal than 1mV of noise with a 1mV of signal. This reasoning also explains the abandonment of RF stages for the ever increasing FM systems at 1 GHz and above region. At these frequencies transistor noise is increasing while gain is increasing. The frequency is reached where it is advantageous to feed the incoming FM signal directly into a diode mixer so as to step it down to a lower frequency for subsequent amplification. Diode (passive) mixers are less noisy than active mixers.
Of course the use of RF amplifiers reduces the image problem. Another benefit is the reduction in local oscillator radiation effects. Without the RF amp. The local oscillator signal can more easily get coupled back into the receiving antenna and transmit interference.

4. MOSFET RF amplifiers
Component values
100MHz
400MHz C1
8.4pF
4.5pF C2
2.5pF
1.5pF C3
1.9pF
2.8pF C4
4.2pF
1.2pF L1
150mH
16mH L2
280mH
22mH C5
1000pF
250pF
The antenna input signal is coupled into gate 1 via the coupling/tuning network C1, L1, C2. Output at the drain is coupled to the next stage by L2,C3,C4 combination.Bypass capacitor CB next to L2 and the RFC ensure that the signal not to coupled into dc supply. RFC opens for RF signals and short to dc. The bypass capacitor from gate 2 to ground provides a short to RF to ground. Bias stability is set up by R1 and R2. The MFE3007 MOSFET used in this circuit provides a minimum power gain of 18dB at 200MHz.

5. The use of a dual-gate device allows a convenient isolated input for an AGC level to control the device gain.
The MOSFET also offers an increased dynamic range (wider range of input signals can be tolerated) compared to JFET, and has the same square-law input-output relationship.
A similar arrangement is used for mixer as the extra gate allows a convenient point for local oscillator signal.

6. Limiters
A limiter is a circuit whose output is constant amplitude for all inputs above a critical value. It’s function in FM receiver is to remove any residual unwanted amplitude modulation and the amplitude variations due to noise.
A transistor limiter is shown has the dropping resistor RC which limits the dc collector supply voltage. This provides a low dc collector voltage which makes this stage very easily overdriven. This is the desired result. As soon as the input is large enough to cause clipping at both extremes of collector current, the critical limiting voltage has been attained and limiting action started.

7. The input/output characteristic for the limiter shows the desired clipping action and the effects of feeding the limited (clipped) signal into an LC tank circuit tuned to the center frequency. The natural flywheel effect of the tank removes all frequencies not near the center frequency and thus provides a sinusoidal output signal. The omission of an LC circuit at the limiter output is desirable for some demodulator circuits.

8. Discriminators
Discriminator is the reverse of a VCO. It converts frequency changes into amplitude changes
frequency changes
Amplitude changes
Discriminator (FM detector) extracts the intelligence that is modulated onto the carrier via frequency variations. The output signal should has an amplitude proportional to the variation of the carrier frequency and whose frequency is dependent upon the carrier’s rate of frequency deviation. Notice that the response is linear between frequency changes and the amplitude changes. FM detection takes place after IF (10.7MHz) amplifier and the maximum deviation is ± 75kHz.

9. Slope Detector
Slope Detector is a combination of off-tuned LC circuit followed by the AM detector as shown below.
frequency changes
amplitude changes
Low V(pp)
High V(pp)
FM detector
Low V(pp)
High V(pp) AM
AM detector

10. Foster-Seely Discriminator
Coupling capacitors C5 and CC will short at carrier frequency, making e1 across L4 . i1 is caused by eS which is coupled from primary voltage e1
e2 and e3 are induced voltage at L2 and L3 caused by the current i2 which is 90deg lagging behind e2 and 90deg leading e3 as e2 and e3 are 180deg out of phase when looked from center tap.

11. Foster-Seely Discriminator (cont’d)
AC e4 < e5
DC e6 < e7
DC Sum e8 < 0
AC e4 > e5
DC e6 > e7
DC Sum e8 > 0
AC e4 = e5
DC e6 = e7
DC Sum e8 = 0

12. Ratio Detector Es = e1 + e2 e0 = (Es/2) - e2 = (e1 - e2 )/2
10.7 MHz IF
Es = e1 + e2
e0 = (Es/2) - e2 = (e1 - e2 )/2
When fin = fc e1 = e2
When fin < fc e1 < e2
When fin > fc e1 > e2

13. Quadrature Detector
EXOR = If the two inputs are equal the output = 0, otherwise output > 0
Change of dc level produce the detected signal
If the two inputs are equal the output = 0, otherwise output > 0
Change of dc level produce the detected signal

14. Phase-Locked Loop (PLL)
Phase comparator or detector
fin
FM input
Voltage controlled oscillator (VCO)
VCO input
Signal output
Low-pass filter
Error output
Level proportional to phase difference between fin and fVCO
fVCO
Control signal = constant value when fin = fVCO
Phase comparator produce error output according to difference of the two frequencies fin and fVCO. When fin = fVCO signal output level = 0. When fin > fVCO signal output level < 0 (see formula of VCO). When fin < fVCO signal output level > 0 This changing dc level at the output creates the detected signal waveform.
If the VCO starts to change the frequency fVCO, it is in capture state. It then continues to change frequency until it’s output is the same as the input frequency fin. At that point , the PLL is locked. PLL has 3 possible states of operation: 1=free running, 2=capture, 3=locked or tracking.
If fVCO and fin are too far apart, the PLL free-runs at the nominal VCO frequency. If fVCO and fin are close enough, the capture process begins and continues until the locked condition is reached. Once locked, the PLL begins the tracking in which it can be locked over a wider range of frequencies than was necessary to achieve capture. The tracking and capture ranges are a function of external resistors and/or capacitors selected by the user.

15. PLL has 3 possible states of operation:
1. free running,
2. capture,
3. locked or tracking.
If f5 and f0 are too far apart, the PLL free-runs at the nominal VCO frequency f5
If f5 and f0 are close enough, the capture process begins and continues until the locked condition is reached.
Once locked, the PLL begins the tracking in which it can be locked over a wider range of frequencies than was necessary to achieve capture.
The tracking and capture ranges are a function of external resistors and/or capacitors selected by the user.

16. Given the PLL circuit shown, find (a) Free running frequency f5 = f0
Example:
Given the PLL circuit shown, find
(a) Free running frequency f5 = f0
(b) Locked or tracking range fL
(c) Capture range fC
(d) Output voltage V7 at f0
Sketch the plot of V7 and fin
fmin
fmax
f0=f5 V7
5.3V 5V
4.7V
fin fL fC

17. Example
A PLL is set up such that it’s VCO free-runs at 10 MHz. The VCO does not change frequency until the input is within 50 kHz of 10 MHz. After that condition, the VCO follows the input to ±200kHz of 10 MHz before the VCO starts free-run again. Determine the lock and capture ranges of the PLL.
A PLL VCO free-runs until the input is within ± 50 kHz of 10 MHz. Then the capture range is ±50kHz or 2x50kHz=100kHz.
After that condition, the VCO follows the input to ± 200kHz of 10 MHz. Out of that range, the VCO starts free-run again. Then the lock ranges of the PLL will be ± 200kHz or 2x200kHz=400kHz