1. W. Smith, U. Wisconsin, US CMS DOE/NSF Review, May, 2004 Trigger Report - 1 CSC on-detector peripheral crate SBS VME Controller Muon Port Card: Output 3 best muons on optical fibers to Sector Processors in Counting Room Clock and Control Board Trigger Motherboard: Input data from Cathode Strips & Anode Wires Full Crate Test validating data flow from Trigger Motherboard PPP’s to Muon Port Card PPP underway now 2003 Structured beam test validated trigger logic performance

2. W. Smith, U. Wisconsin, US CMS DOE/NSF Review, May, 2004 Trigger Report - 2 CSC Trigger Muon Port Card & Sector Processor Mezzanine card TLK2501 serializers OptomodulesGTLP Receivers VME Interface (glue logic) 15 X 1.6 Gb/s optical links from MPC Xilinx Virtex-2 800 User I/O Muon Port Card (Rice): PPP fully tested stand-alone Testing w/ TMB, SP, CCB Total needed: 60 Sector Processor (Florida): PPP: individual functions tested Full Track Finder Firmware now being incorporated Total needed: 12

3. W. Smith, U. Wisconsin, US CMS DOE/NSF Review, May, 2004 Trigger Report - 3 CSC Sorter & Clock Boards Muon Sorter (Rice): PPP: all inputs fully tested Integration tests w/Sector Processor underway Total needed: 1 Clock & Control Board (Rice): Rad-tolerant, total needed: 61 Testing underway In peripheral crates & track-finder Basic VME interface uses discrete logic Critical functions immune to SEU VME/JTAGINTERFACE GTLPBACKPLANEINTERFACE MEZZANINECARD LVDSDRIVERS AND SCSI-3 CONNECTORS New TTCrq mezzanine w/QPLL ASIC

4. W. Smith, U. Wisconsin, US CMS DOE/NSF Review, May, 2004 Trigger Report - 4 Full Regional Cal. Trigger Crate (Wisconsin) 18 Such Crates make up the full RCT System covering |  |<5 & 0 <  < 2 . Rear: Receiver CardsFront: Electron, Jet, Clock Cards

5. W. Smith, U. Wisconsin, US CMS DOE/NSF Review, May, 2004 Trigger Report - 5 Cal Trigger Receiver Cards (Wisconsin) Front with 2 of 8 mezzanine cards & 3 Adder ASICs DC-DC Adder mezz link cards BSCAN ASICs PHASE ASICs MLUs Back with all Phase & Boundary Scan ASICs Pre-Production full feature RC and all ASICS fully validated. All 1420 mezzanine link cards produced and tested at UW Link Integration tests with ECAL & HCAL successful RC production started and 2 boards validated, expect remainder of order within a couple of months (152). Bar Code

6. W. Smith, U. Wisconsin, US CMS DOE/NSF Review, May, 2004 Trigger Report - 6 SORT ASICs (w/heat sinks) EISO Bar Code Input Receiver Mezz. Card BSCAN ASICs Sort ASICs BSCAN ASICs Phase ASIC DC-DC Converters Clock delay adjust Clock Input Oscillator Production Electron Isolation Card & Prototype Jet-Summary Card (Wisconsin) Electron Isolation Card Production testing started 11/143 done Jet/Summary Card Full function prototype tested Full crate test - all output paths verified, electron sort, jet output all OK PPP being built, 25 needed Integration test with Global Cal Trigger successful Clock Card Production testing started 5/25 done

7. W. Smith, U. Wisconsin, US CMS DOE/NSF Review, May, 2004 Trigger Report - 7 Installation in Underground Counting Room Expect start in June ‘05 Racks & Infrastructure installed Sufficient time for installation & some testing but not for full commissioning w/ detectors Significant time needed for integration in synchronous pipelined system Surface tests in SX5 With both HCAL and EMU Verify trigger functions & interfaces by testing w/detectors on surface at CERN. Use to reduce commissioning time as much as possible. Will check as much on surface before gaining access to underground facilities. Planned for October ‘04 - May ‘05 Tests in Electronics Integration Facility Set up central core of critical racks Underground Counting Room Trigger Installation