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Actel A54SX-A and RTSX-SU Reliability Testing Update Antony Wilson, Minal Sawant, and Dan Elftmann.

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Presentation on theme: "Actel A54SX-A and RTSX-SU Reliability Testing Update Antony Wilson, Minal Sawant, and Dan Elftmann."— Presentation transcript:

1 Actel A54SX-A and RTSX-SU Reliability Testing Update Antony Wilson, Minal Sawant, and Dan Elftmann

2 Paper #1028September 7 th - 9 th, 2005MAPLD 2005: Actel A54SX-A and RTSX-SU Reliability Testing Update 2 S-Antifuses  S-antifuses connect the output track of one logic module to the input track of another logic module  Single S-antifuse nets do not use freeways  No horizontal or vertical freeway connection  Much lower capacitive loading than other types of nets  Much faster edge rates and higher peak operational current Logic Module Freeway Antifuses (“F-antifuses”) Semi-Direct Antifuses (“S-antifuses”) Cross Antifuse (“X-antifuses”) Input Antifuses (“I-antifuses”) Logic Module Single S-antifuse Net

3 Paper #1028September 7 th - 9 th, 2005MAPLD 2005: Actel A54SX-A and RTSX-SU Reliability Testing Update 3 Programming Roadmap (1)  UMC Modified Algorithm (UMA)  UMA will provide low programming current antifuses longer soaking pulses, in order to ensure no weak links  Includes S, B, I and K-antifuses  UMA will be included in Silicon Sculptor II  Version 3.90 (DOS) / 4.53 (Windows)  Shipping since July 2005  UMA uses the new AFM format  Introduced in Designer 6.1-SP1  Shipping since March 2005

4 Paper #1028September 7 th - 9 th, 2005MAPLD 2005: Actel A54SX-A and RTSX-SU Reliability Testing Update 4 Programming Roadmap (2)  S-Antifuse Loading (SAL)  Adds capacitive loading by connecting a freeway track  Reduces I PEAK in single S-antifuse nets by a minimum of 33%  No measurable increase in routing delay of single S-antifuse nets  Requires design re-compilation  Placement will not change, only routing capacitance is added  Timing changes are minimal  Timing analysis encouraged  AFM checksum changes  SAL Availability  Designer / Libero version 6.2-SP1  Shipping since August, 2005 Logic Module Single S-Antifuse Net Freeway track adds capacitive loading

5 Paper #1028September 7 th - 9 th, 2005MAPLD 2005: Actel A54SX-A and RTSX-SU Reliability Testing Update 5 Aerospace Space Qualification RTSX72SU-CQ208RTSX32SU-CQ208 125°C75-UMA+SAL150-Standard– Started 5/2/2005 -55°C75-Standard150-UMA+SAL  Reliability testing to be done by Aerospace Corporation in Space Qualification  Additionally  Actel donating 80 A54SX72A-PQ208I units to Aerospace Corp. for testing of SAL & UMA in Long Term Life Experiment (LTLE)  Actel donating 80 RTSX72SU-CQ208B units to Aerospace Corp. for testing of SAL & UMA in Long Term Reliability experiment

6 Paper #1028September 7 th - 9 th, 2005MAPLD 2005: Actel A54SX-A and RTSX-SU Reliability Testing Update 6 High Single S-Antifuse Design Objective  Create a reliability test vehicle design that approaches, if not achieves, the maximum number of Single S-Antifuses in a ’72 size device  Nets must be capable of being toggled on a Burn In Board (BIB) at a high toggle rate  Delay line time should be ~100 ns (short) to reduce thermal influence on measurement

7 Paper #1028September 7 th - 9 th, 2005MAPLD 2005: Actel A54SX-A and RTSX-SU Reliability Testing Update 7 High Single S-Antifuse Design Combinatorial Circuit(s)  Combinatorial (C-Cells) logic utilization to achieve high S-antifuse count  S-antifuse used in every routing path between c-cells

8 Paper #1028September 7 th - 9 th, 2005MAPLD 2005: Actel A54SX-A and RTSX-SU Reliability Testing Update 8 High Single S-Antifuse Design Sequential Circuit(s)  Sequential (R_Cells) logic utilization to achieve high S-antifuse count  S-antifuse is only on nets routed within a super-cluster  Circuit acts like dominoes; CLKB sets up the dominoes and HCLK knocks them down

9 Paper #1028September 7 th - 9 th, 2005MAPLD 2005: Actel A54SX-A and RTSX-SU Reliability Testing Update 9 HiSS A54SX72A-PQ208 Antifuse Utilization B=> 0Antifuse between Local Track and input I=> 987Antifuse between horizontal segment & input S=> 5007Antifuse between output track & input (semi-direct) K=> 2033Antifuse between input & horizontal NCLK0 or NCLK1, or QCLK 8027 Total Low Programming Current Antifuses F=> 1029Antifuse between freeway & output track X=> 1026Antifuse between horizontal segment & freeway V=> 0Antifuse between two vertical tracks H=> 0Antifuse between two horizontal tracks W=> 31Antifuse between horizontal segment & 2nd freeway on the net (old-style freeway) G=> 0Antifuse between output track & 2nd, 3rd, & 4th freeway on the net 2086 Total High Programming Current Antifuses 10113 Total Dynamic Antifuses J=> 45116Antifuse between input & horizontal NVCC or NGND M=> 46Antifuse for I/O configuration options Q=> 10Silicon Signature antifuse in silicon signature words T=> 0Antifuse between output track & input used early in programming sequence to tie off floating output track Y=> 15769Antifuse between horizontal segment & vertical NVCC or NGND Z=> 9074Antifuse between freeway & horizontal NVCC or NGND 70015 Total Static Antifuses 80128 Total Antifuses All 5,007 S-Antifuses are Single S-Antifuse nets UMA Algorithm applies to all B, I, S & K antifuses

10 Paper #1028September 7 th - 9 th, 2005MAPLD 2005: Actel A54SX-A and RTSX-SU Reliability Testing Update 10 High S-Antifuse Stress Qualification SX72A-PQ208 UMC 24MHz D1JJT1 ExperimentDesigner / Sculptor V CCA (V) T A /T J (º C) T0168 Hours 3 rd Read Point 1000 Hours 2000 Hours STD w/HiSS6.0 / 3.872.5085/121110/110108/108 714 hours 108/108108 Due 9/23/05 STD w/HiSS6.0 / 3.872.5085/121132 Due 9/14/05 Due 9/23/05500 hours Due 10/12/05 Due 11/9/05Due 1/4/05 STD w/HiSS6.0 / 3.873.00100/14599/10098/99 1 single S-Antifuse 97/98 813 hours 1 single S-Antifuse 97/97 UMA w/HiSS6.1 SP1 / 3.903.00100/145101/101 100/101 788 hours 1 single S-Antifuse 100/100 UMA w/HiSS+SAL 6.2 SP1 / 3.903.00100/145102/102 102/102 651 hours 102/102102 Due 9/21/05 STD w/HiSS+SAL 6.2 SP1 / 3.873.00100/145116/117 1 continuity failure 108/108108/108 625 hours 108/108 UMA w/HiSS+SAL 6.2 SP1 / 3.903.00-55/-21110/110108/108108/108 645 hours 108/108 UMA P7 Design 50MHz 3000S 6.1 SP1 / 3.902.75110/145208/208204/204204/204 668 hours 203/203 Device 59050 not uploaded

11 Paper #1028September 7 th - 9 th, 2005MAPLD 2005: Actel A54SX-A and RTSX-SU Reliability Testing Update 11 High S-antifuse Stress Qualification Next Steps  Continue 108 HiSS units w/STD algorithm to 2000 hrs  V CCA = 2.50 V T A = 85ºC  Will add 132 HiSS units w/STD algorithm  V CCA = 2.50 V T A = 85ºC  Continue 108 HiSS units w/UMA algorithm & SAL to 2000 hrs  V CCA = 3.00 V T A = 100ºC

12 Paper #1028September 7 th - 9 th, 2005MAPLD 2005: Actel A54SX-A and RTSX-SU Reliability Testing Update 12 NASA Test Based on Shape Factor of Aerospace 72SXAU Long Term Experiment

13 Paper #1028September 7 th - 9 th, 2005MAPLD 2005: Actel A54SX-A and RTSX-SU Reliability Testing Update 13 S Antifuse FIT CALC for NASA 32S Test  0.0091 in 100K Hours = 91 FIT  5X for 0.2eV  T J = 150ºC  10X for Voltage Acceleration  V CCA = 2.75 V  2X for Utilization  Single S-Antifuse utilization 251 vs. 832  5X for Visibility  If delay >10ns no visibility factor  FITs = 91/500 =.182 FIT in 10 Years

14 Paper #1028September 7 th - 9 th, 2005MAPLD 2005: Actel A54SX-A and RTSX-SU Reliability Testing Update 14 B-Antifuse within the Device Architecture  The B-Antifuse is driven by the dedicated DB-Inverter in each C-Cell  4,126 unique functions exist in the RTSX-SU library  16,879 different configurations  3,730 of these macro library configurations utilize B- Antifuses  3,001 Macros have single B-Antifuse configurations  2,565 have no other option  337 Can be implemented without the B-Antifuse map string configurations  99 have a multiple B-Antifuse map string option for macro implementation  None of the 3,730 have a don’t care input available for additional loading

15 Paper #1028September 7 th - 9 th, 2005MAPLD 2005: Actel A54SX-A and RTSX-SU Reliability Testing Update 15 B-Antifuse Usage Statistics Number of Single B-Antifuse Netsvs. Aerospace ASQ '32 Customer Designs Raw Average -> 3023.7 Raw Geometric Mean -> 2225.1 Min -> 1575.2 Max -> 5722.0 '72 Customer Designs Raw Average -> 6734.8 Raw Geometric Mean -> 6375.1 Min -> 31410.3 Max -> 1,1722.8 All Customer Designs Normalized Average -> 6455.0 Normalized Geometric Mean -> 5276.1 Reliability Test Vehicle (RTV) Designs RT54SX32SU-CQ208 ASQ 1,1281.0 RT54SX32SU-CQ208 Colonel 3532.2 RT54SX32SU-CQ208 General 2153.7 RT54SX32SU-CQ208 NASA 2938.9 RT54SX72SU-CQ208 ASQ 3,2321.0 RT54SX72SU-CQ256 QBI 1,2412.6 RT54SX72SU-CQ208 P7 23140.5 A54SX72A-PQ208 QBI 1,1642.8 A54SX72A-PQ208 P7 28115.4 A54SX72A-PQ208 ALTE 4080.8 A54SX72A-PQ208 HiSS -n/a

16 Paper #1028September 7 th - 9 th, 2005MAPLD 2005: Actel A54SX-A and RTSX-SU Reliability Testing Update 16 HiBS  Design Concept  Maximize B-Antifuse utilization using CM8INV macros  Maximize S-Antifuse utilization by routing c-cells in serial chain within supercluster

17 Paper #1028September 7 th - 9 th, 2005MAPLD 2005: Actel A54SX-A and RTSX-SU Reliability Testing Update 17 HiBS  Routing within a supercluster to maximize S-Antifuse utilization  Routing technique on a device

18 Paper #1028September 7 th - 9 th, 2005MAPLD 2005: Actel A54SX-A and RTSX-SU Reliability Testing Update 18 HiBS A54SX72A-PQ208 Antifuse Utilization B=> 4900 Antifuse between Local Track and input S=> 2248 Antifuse between output track & input(semi-direct) I=> 1755 Antifuse between horizontal segment & input K=> 21 Antifuse between input & horizontal NCLK0 or NCLK1, or QCLK 8924 Low Programming Current Dynamic Antifuses F=> 4024 Antifuse between freeway & output track G=> 0 Antifuse between output track & 2nd, 3rd, & 4th freeway on the net H=> 0 Antifuse between two horizontal tracks V=> 0 Antifuse between two vertical tracks W=> 15 Antifuse between horiz segment & 2nd freeway on the net (old-style freeway) X=> 1774 Antifuse between horizontal segment & freeway 5813 High Programming Current Dynamic Antifuses 14737 Total Dynamic Antifuses J=> 44219 Antifuse between input & horizontal NVCC or NGND M=> 24 Antifuse for I/O configuration options Q=> 11 Silicon Signature afuse in silicon signature words Y=> 15021 Antifuse between horizontal segment & vertical NVCC or NGND Z=> 6095 Antifuse between freeway & horizontal NVCC or NGND 65370 Total Static Antifuses 80107 Total Antifuses UMA Algorithm applies to all B, I, S & K antifuses All 4,900 B-Antifuses are Single B-Antifuse nets

19 Paper #1028September 7 th - 9 th, 2005MAPLD 2005: Actel A54SX-A and RTSX-SU Reliability Testing Update 19 High B-Antifuse Stress Experiments A54SX72A-PQ208 UMC 24 MHz Expt Vcca (V) T A /T J (º C) T0160h500h1000h2000h UMA w/HiBS + SAL 2.5105/145 108/108 9/28/0510/19/0512/7/05 UMA w/HiBS + SAL 3.095/145 108/108 9/28/0510/19/0512/7/05 UMA w/HiBS + SAL 3.2583/145 108/1089/10/059/28/0510/19/0512/7/05

20 Paper #1028September 7 th - 9 th, 2005MAPLD 2005: Actel A54SX-A and RTSX-SU Reliability Testing Update 20 Aerospace Space Qualification Based on Shape Factor of A54SX72A (UMC) Aerospace Long Term Experiment (ALTE)

21 Paper #1028September 7 th - 9 th, 2005MAPLD 2005: Actel A54SX-A and RTSX-SU Reliability Testing Update 21 B-Antifuse FIT CALC for 32S Aerospace Space Qualification  0.0307 to 0.0458 in 100K Hours = 307 - 458 FIT  50 – 60% Confidence  5X for 0.2eV  Tj = 150ºC  5X for Utilization  Single B-Antifuse utilization 645 vs 3232  2.5X for Visibility  5X < 10ns  1X > 10ns  FITs = 307 to 458 / 67.5 = 4.6 to 6.8 FIT in 10 Years

22 Paper #1028September 7 th - 9 th, 2005MAPLD 2005: Actel A54SX-A and RTSX-SU Reliability Testing Update 22 Aerospace Space Qualification

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