1. Synthesizing a Bitcoin Miner for the OR1200 Tom Tracy II ECE 6502 – ASIC/SOC Spring 2014

2. How bitcoin works, by Joshua J. Romero, Brandon Palacio & Karlssonwilker Inc.

3. Miners are paid 50 Bitcoins (~$22k) to the miner that finds the nonce that generates the ‘winning’ block They are also paid a small transaction fee

4. Motivation Increase the Bitcoin mining capabilities of the OR1200. Make more money. http://blockchain.info/charts/difficulty

5. Goal Integrate the Bitcoin miner into the class’s OR1200 processor. 1. Synthesize the Wishbone interface for the OR1200 2. Synthesize the Bitcoin Miner (accelerator) 3. Synthesize the Slave Wishbone interface for the Bitcoin Miner

6. Procedure 1. Modify the Johnson_Counter DC example scripts for the new RTL. 2. Attempt DC Fail? Continue to 1 Success? Wonderful; continue to 3 3. Modify the Johnson_Counter ICC example scripts for the new RTL. 4. Attempt ICC Fail? Continue to 3 Success? Wonderful! Handle DRC Errors

7. Synthesizing the OR1200 Wishbone Interface

8. Wishbone Interface Results

9. Ports and Lessons Learned Lessons 1. Use zroute instead of global route_opt Todo: Solve 234 spacing and area DRC errors.

10. Synthesizing the Bitcoin Miner

11. Bitcoin Miner Results

12. Ports and Lessons Learned Lessons ovDigest contains the last 8 digests, and is used for simulation only. Turn this off; significantly reduces size. Synopsys is not perfect: 74 hours to run one command

13. Wishbone Slave Interface The plan was to use wbgen2 to generate the Verilog for the Wishbone bus. It requires a configuration file, and then generates the RTL to be synthesized Getting an error: Unknown register style. http://www.ohwr.org/projects/wishbone-gen/wiki/Wbgen2_Documentation

14. Future Work 1. Solve OR1200 WB interface and Bitcoin Miner DRC errors. 2. Solve the error and finish the Wishbone slave interface. 3. Complete memory block