1. ME342E Class update IR Grating Group 7/13/2006

2. Characterizations performed ► Al deposition thickness (got 120 nm) ► LTO deposition thickness (.6-.8 um) ► Exposure time on oxide surface with 3 um PR ► Exposure time on Al surface with 3 um PR ► Poly deposition thickness (tried but failed due to unfortunate circumstances)

3. Changes to process ► Found out that KOH will not work with the rest of our process for backside etching – dropped split ► Will be depositing Ti and W on a few wafers (Phase 1 & 2 only) to characterize grating performance with different metals ► Will be ordering 4-6 SOIs (out of desperation)

4. Roadblocks ► Mask writer down ► P5000 down ► Gryphon (was) down (burning in targets) ► LTO tube (went) down (partially up) ► Poly tube (went) down (partially up)

5. Processing tips for dummies ► Do not walk out of the litho room when your wafers have undeveloped PR ► Murphy’s law applies: If you can reserve it, it is/will go down ► Al does oxidize, and confuses you in thinking you have not fully stripped the PR ► SVG Coater likes to play catch with wafers. It is not ready for the major leagues … ► 10 mins does not equal 10 secs ► When you say “Chrome side up”, you should really define the Newtonian frame of reference

6. Future steps planned ► LPCVD poly (almost) up – will do deposition on this weekend ► P5000 will be up by Friday evening or Monday evening – will perform dry etching of Al / SiO2 stack over weekend if up ► Release characterization on drytek2 ► Complete comb mask by Saturday, and will submit for writing at Berkeley

7. Parting words … A picture is worth a 1000 words. A processed Silicon wafer is ??