1. INTRODUCTION TO MICROPROCESSOR

2. Do you know computer organization? Arithmetic Logic Unit Memory Output Input Control Unit

3. -How does it work? -Map it’s units in personal computer – Input Output Memory ALU Software – System software & Application software

4. Introduction to Microprocessor ARITHMATIC LOGIC UNIT CONTROL UNIT MEMORY INPUT OUTPUT MICROCOMPUTER MICROPROCESSOR

5. Microprocessor Based System INPUT µP OUTPUT MEMORY INPUT µC OUTPUT MEMORY External memory in addition to internal memory may be desired

6. Address, Data and Control Bus Bus - defined pathway for transfer of digital information between different units. To write data to memory or output device. - µp needs to send. Address of memory location or port address of device.. Data. Write control signal To read data from memory or Input device - µp needs to send. Address and. Read Control Signal - Memory/device sends – data.

7. Thus three pathways (buses) for 3 types of digital information. Address Bus - From µp to devices - Unidirectional. Data Bus - From µp to devices & devices to µp - Bidirectional Control - From µp to devices & from devices to µp [Interrupt, DMA] - Bidirectional Now let us redraw the computer organization diagram

8. Address Bus I/O Device I/O Device I/O Device Memory µp Control Bus Data Bus

9. Example of memory & I/O Read Write.

10. Device X Gate X Gating Input X’ Device Y Gate Y Gating Input Y’ Device Z Gate Z Gating Input Z’ Output Only one device should transmit at any given time Tristate Bus Three data transmitters X, Y, Z connected to single bus Bus

11. If Gate X, Gate Y and Gate Z are conventional TTL gates then – they will have only two states 0, or 1. There will always be signal at their output. Information at output point is garbled. What is required- Y and Z should disconnect from bus when X is transmitting. X and Z should disconnect from bus when Y is transmitting. X and Y should disconnect from bus when Z is transmitting.

12. To meet above requirement Gates X, Y and Z should have following 3 output states. Logic 1 state Logic 0 state A state in which output is disconnected from rest of circuit or other devices. The third state is called High Impendence state. Such devices are called Tristate Devices. They have extra input called Disable. Input Disable Output

13. When disable is OFF – device functions normally as 2 state device When disable is ON – device is disconnected from the bus

14. Interrupt Ack Interrupt Req Microprocessor Address Lines Data Lines Ground Power Serial Output Serial Input Reset Out Reset In Clock Out Clock DMA Ack DMA Req Wait Req ______ MEMR _______ MEMW ___ IOR ____ IOW A generalized µP chip

15. Why clock? What is DMA? What is Interrupt? What is serial Input? What is serial Output?