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Published byCora Riley Modified over 9 years ago
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A new ASICX design center at PSI Chip Design Core Group 2008 CHIPP Annual Pleanary Meeting EPFL 9. September 2008 Roland Horisberger Paul Scherrer Institut
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1.4.2006 History of Chip Design at PSI (1989 2007) Chip design at PSI started in 1989 for planned B-Meson factory at PSI Tech. Function Experiment PSI 1SAC 3 Silicon strip readout 32 channels m experiment PSI 2SAC 3 Signal sampler (drift chamber), 300 MHz PiBeta exp. PSI 18 SAC 1 Silicon strip pipeline(32) chip APC128 H1-vertex detector HERMES (MSGC) PSI 26 DMILL Pixel Prototype Chip for CMS PSI 30 DMILL Pixel Testbeam Chip for CMS PSI43 DMILL Full CMS Pixel ROC PSI 46 0.25 Full CMS Pixel ROC ( final chip) CMS Pixel ROC PSI ~65 Chips for x-ray Pixel Systems, x-ray Strips, Signal Samples PILATUS 1,2 & XFS MYTHEN DRS MEG, Magic
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1.4.2006 Chip Design at PSI (1989 2007) ASIC CAD installation by PSI LTP-group (R.H.) PSI SLS X-ray Strips MYTHEN chips (B. Schmidt) PSI SLS X-ray Pixel PILATUS chips (Ch. Brönnimann) MEG Experiment wave form sampler DRS chips (St.Ritt) Desy Zeuthen silicon strip readout rad. hard APC128 chips (I. Tsurin) Past working model: Other groups plug into existing ASIC CAD installation & culture with their own manpower and get quickly productive good for us too ! maintained critical size of effort ! PiBeta Experiment wave form sampler Chip (R.Schnyder)
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1.4.2006 New Chip Design Core Group 2008 ASIC CAD installation by PSI Chip Design Core Team PSI Group PSI experiment Chip to be done New model: New Chip Design Core Team maintains ASIC CAD PSI internal groups and external University groups as plug in users Chip Design Core Team helps, but does not their work ! PSI CMS Pixel Group SLHC upgrade New Pixel ROC PSI SLS Pixel Group New x-ray pixel det. PILATUS XFS University Groups e.g. LHCb upgrade new super chip
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Chip–Design–Core–Group at PSI Over last 10 years very good experience inside PSI with following model: 1)A core group keeps basic chip design CAD effort going and works on own projects (chips) (historical done by CMS pixel group) 2)Interested groups can plug in and get helped with basic start up, support, consultation and evtl. cooperation Examples: Pilatus x-ray pixel detector for SLS Mythen Silicon Strip x-ray detector for SLS APC128_DSM ( DESY, Zeuthen) Domino Sampling Chip for MEG, Magic, etc. With new created Chip-Design-Core-Group model is now official. Expand “plug in user groups” beyond PSI to CH university groups (Since 2008) PSI acts as CH facility for activities with major setup efforts ( CAD maintenance) Strengthens links PSI Universities
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Chip–Design–Core–Group at PSI Currently 3 people in PSI Electronic group of Nick Schlumpf (LTP): Beat Meier Physicist / Electric Engineer Roberto Dinapoli Electric Engineer Xintiab Shi Electric Engineer
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The MythenII readout chip x-ray photon silicon strip readout. 128 channels, 50 um pitch 24 bit counter/strip -> high dynamic range Low noise -> 195 ENC, high rate 1MHz Strip sensor MythenII
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CMS Pixel Read Out Chip 251 Transistors /pixel 100 150 9.8 mm IBM_PSI46 0.25 m CMOS Technology 1.28 million transistors radiation hard design ( ~40Mrad) CAD picture of a pixel
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Domino Ring Sampler (DRS) Chip 12 channels each 1024 samples deep Sampling speed 10 MHz … 5 GHz 0.25 m CMOS process 5 x 5 mm2, radiation hard (Stefan Ritt. PSI)
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Paul Scherrer Institut 5232 Villigen PSI Roberto Dinapoli Pilatus XFS: the pixel
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