1. Central Processing Unit Decode Cycle

2. Central Processing Unit Current Instruction Register (CIR) I1 The fetch cycle has transferred an instruction from memory into the Current Instruction Register (CIR) Decode Cycle Control Unit

3. Central Processing Unit Current Instruction Register (CIR) I1 One part of the control unit, the decoder, is used to decode the instructions that have been fetched from memory. Decode Cycle Control Unit Decoder Clock Control Logic Circuits

4. Central Processing Unit Current Instruction Register (CIR) I1 The instruction below has been decoded Decode Cycle Control Unit Decoder Clock Control Logic Circuits Opcode Operand Instruction ADD MOV STO LDA #12, #20; AL, #10; 34; Adds 12 and 20 together Moves 10 into register AL Stores result in accumulator in address 34 23; Load value 23 into the accumilator (Data or an address)

5. Central Processing Unit Decode Cycle Load up the following web page and try to answer the following questions: http://en.wikibooks.org/wiki/A- level_Computing/AQA/Computer_Components,_The_Stored_Program_Concept_and_the_Internet/Machine_Level_Architecture/Machine_code_and _processor_instruction_set