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Cpe 252: Computer Organization1 Lo’ai Tawalbeh Lecture #3 Flip-Flops, Registers, Shift registers, Counters, Memory 3/3/2005.

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Presentation on theme: "Cpe 252: Computer Organization1 Lo’ai Tawalbeh Lecture #3 Flip-Flops, Registers, Shift registers, Counters, Memory 3/3/2005."— Presentation transcript:

1 cpe 252: Computer Organization1 Lo’ai Tawalbeh Lecture #3 Flip-Flops, Registers, Shift registers, Counters, Memory 3/3/2005

2 cpe 252: Computer Organization2 Flip-Flops A storage element employed in clocked sequential circuits. It is a binary cell Capable of storing one bit of information. One Flip-Flop for each bit. Characteristic Tables shows the behavior of the F-Fs (sec 1.6) F-Fs analysis : given logic Diagram, find the state diagram. F-Fs design : given the state diagram, find the logic diagram. Examples in section 1.7

3 cpe 252: Computer Organization3 Notation, characteristic equations: Q* means “the next value of Q.” (or Q + ) “Excitation” is the input applied to a device that determines the next state. “Characteristic equation” specifies the next state of a memory device as a function of its excitation. S-R latch: Q* = S + R´ · Q Edge-triggered D flip-flop: Q* = D When does Q becomes Q*

4 cpe 252: Computer Organization4 Example state machine

5 cpe 252: Computer Organization5 Excitation equations

6 cpe 252: Computer Organization6 Excitation Functions- Table 1-3, page 27 S Q c R Q’ D Clk Q Q' D-FF J Q Clk K Q' T Clk Q Q' D-FF

7 cpe 252: Computer Organization7 The Design Procedure Obtain a binary description of the system. Select the type of flip-flops. Determine the inputs to the flip-flops (use the excitation function). Design a combinational network for the FF input functions –Next State. Design a combinational network for the system output. **Example in the class

8 cpe 252: Computer Organization8 Registers Storage Element accessed faster than the memory

9 cpe 252: Computer Organization9 4-bit Register

10 cpe 252: Computer Organization10 Shift Register

11 cpe 252: Computer Organization11 Shift Register Control s(t) = 0101  z(t) = s(t) Output has the same value as the current state

12 cpe 252: Computer Organization12 4-bit Bi-directional Shift Register

13 cpe 252: Computer Organization13 Counters J K Q Q Q Q Clock Counter Enable (CE) A0A0 A1A1 A2A2 A3A3 Output Carry JKQ(t+1) 00Q(t) 010 101 11Q’(t) JK FF Characteristic Table

14 cpe 252: Computer Organization14 MEMORY COMPONENTS Logical Organization Random Access Memory (RAM) - Each word has a unique address - Access to a word requires the same time independent of the location of the word - Organization words (byte, or n bytes) 2 k Words (n bits/word) n data input lines n data output lines k address lines Read Write 0 N - 1

15 cpe 252: Computer Organization15 Read-Only Memories Program storage –Boot ROM for personal computers –Complete application storage for embedded systems. m x n ROM (m=2 k ) n- data input lines n data output lines K- address lines

16 cpe 252: Computer Organization16 Example Design a 32K-8 bit ROM using blocks of a 4k-8 bit Roms. Solution: 1- How many address lines are needed? 32k = 2^5X2^10=2^15; So, 15 address lines needed to map 32k locations in the ROM. 2- How many 4k ROM blocks are needed? 32k/4k = 8 blocks 3- How many address lines are needed for each 4k ROM block? 4k=2^2X2^10 = 2^12, so 12 address lines. So we connect the MS 12 address lines to each one of the 8 (4k-blocks); The remaining 3 LS address lines are inserted to a 3-8 decoder to choose the appropriate 4k ROM block. * Draw the circuit.


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